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Fri, 27 May 2022 09:16:20 +0000 From: Li Jun To: gregkh@linuxfoundation.org, balbi@kernel.org Cc: linux-usb@vger.kernel.org, Thinh.Nguyen@synopsys.com, jindong.yue@nxp.com Subject: [PATCH] usb: dwc3: add power down scale setting Date: Fri, 27 May 2022 17:03:15 +0800 Message-Id: <1653642195-23889-1-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 X-ClientProxiedBy: SI2PR04CA0008.apcprd04.prod.outlook.com (2603:1096:4:197::20) To PA4PR04MB9640.eurprd04.prod.outlook.com (2603:10a6:102:261::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5d2f8e05-7618-45ba-2188-08da3fc18fbe X-MS-TrafficTypeDiagnostic: DB8PR04MB7161:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: j+BnqFZcdcXbEcQvHbhHuZwI9w1Tg7JL64QZKHauuObfuAcDMLHqw0pqCp6Jcowj51OxAvbqGehcxn73FSIH1zrgKGE6ulYztsMJiSeVtiX96IdUopMPfAN81AjsqHTEGmLq3aQJBnDKWfM7SV7p1K6yMPQxObp0Fr2Z35DHGaMu1qS2kpQzq6KDhm37HcGmFj1v5PRmtHa6CDi273do3+6V42q1tMX6FhrexDjwNnxRfs3T24YekNRhCzoZIH9OKZPg6mjwZp6i2+gMH8TWwb9cIyviuHBMOvSVHqt989ZULyVjwuc7KM89tl+XYgv/txIjyVyoLDLbusaLbkzZ9JDyczKw0ujlpL3W2ge/29KXmJweitI4viVL14t4Sg9XEdrmzeH3+5DbndpN3o7ZnUrM8ogmkLUjzbBsla/p8TM5/txBGi62/j2FFqu93mdpIyAp0mN5AKVmHK3vOM5i7YLtBQ4S1/Ct0L+BQTf+es1mc+5anFktfB5iXUSuD3lak62NFapkWB0utUeacnFNqgEleAEAy+tvnQj5ElbMeiuQiIJpR4g63ioxWaJ1t6nzv/dOn/vOo5KzzowlY6pdSC7WAXO4MtBg2GUmjJJXLltQo1XLrnoK4UQ05LJyACfwi4tD8NLZ5pkmS172M67rIxEnPInHKisiu+/OrxJ3GBkzCp9Nx9KOw3GT8QajirdcXBDG5s6rjxi0rXlp3OXJzw== X-Forefront-Antispam-Report: CIP:255.255.255.255; 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The Power Down Scale field specifies how many suspend_clk periods fit into a 16 kHz clock period. When performing the division, round up the remainder. For example, when using an 8-bit/16-bit/32-bit PHY and 25-MHz Suspend clock, Power Down Scale = 25000 kHz/16 kHz = 13'd1563 (rounder up) So use the suspend clock rate to calculate it. Signed-off-by: Li Jun --- drivers/usb/dwc3/core.c | 22 ++++++++++++++++++++++ drivers/usb/dwc3/core.h | 1 + 2 files changed, 23 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index e027c0420dc3..16d441dbc28b 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1029,6 +1029,25 @@ static void dwc3_set_incr_burst_type(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg); } +static void dwc3_set_power_down_clk_scale(struct dwc3 *dwc) +{ + u32 reg, scale; + + if (!dwc->susp_clk) + return; + + /* + * The power down scale field specifies how many suspend_clk + * periods fit into a 16KHz clock period. When performing + * the division, round up the remainder. + */ + scale = DIV_ROUND_UP(clk_get_rate(dwc->susp_clk), 16384); + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg &= ~(DWC3_GCTL_PWRDNSCALE_MASK); + reg |= DWC3_GCTL_PWRDNSCALE(scale); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); +} + /** * dwc3_core_init - Low-level initialization of DWC3 Core * @dwc: Pointer to our controller context structure @@ -1105,6 +1124,9 @@ static int dwc3_core_init(struct dwc3 *dwc) if (ret) goto err1; + /* Set power down scale of suspend_clk */ + dwc3_set_power_down_clk_scale(dwc); + /* Adjust Frame Length */ dwc3_frame_length_adjustment(dwc); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 81c486b3941c..722808d8c0af 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -231,6 +231,7 @@ /* Global Configuration Register */ #define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19) +#define DWC3_GCTL_PWRDNSCALE_MASK GENMASK(31, 19) #define DWC3_GCTL_U2RSTECN BIT(16) #define DWC3_GCTL_RAMCLKSEL(x) (((x) & DWC3_GCTL_CLK_MASK) << 6) #define DWC3_GCTL_CLK_BUS (0)