From patchwork Thu Dec 12 13:26:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Porter X-Patchwork-Id: 22285 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qe0-f69.google.com (mail-qe0-f69.google.com [209.85.128.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 16DCF23FC9 for ; Thu, 12 Dec 2013 13:26:32 +0000 (UTC) Received: by mail-qe0-f69.google.com with SMTP id 1sf742974qec.8 for ; Thu, 12 Dec 2013 05:26:31 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=XIXczf8zHKLrGEzrIY/yc7YBhZhokZ3mMwH56vr3szw=; b=kVqmdPstZha5iE5NsuNABvkTuWYQ0U57frFumNn36BVOWbVuYESYriqF35RikHfsWb rkQG/T24Je9mUZPLWSSvVr0YJYGGYuWGmNdHxHUYTlTm6rV3d+X/Q+PmFiFnES7fPsbH p7aWiFPWXsX3b/EypoN43ikkzx1ev9Uf8JtKuWgMxoPs1pYGV49+8K2YoP9uc+ALRplc 3XxR+E03zFqLPmoc+BOaSnhYrp5CpiLiikSru1F+d4k44mXveIuUdFR5HrCUGuoa4/64 Lf9JJyy9pAbTfk+fSlsHiWPdu5D2QQeisPHCPGixeiLwOkr5kfRq9+qptAJzMHvyIEHH r+Pw== X-Gm-Message-State: ALoCoQmNrd68BxbzCFdjPqxZT+6t63O/ufResfUpI+9pS3fWyl94ZbYFAqW1Uz6Vrospzu6mNR2L X-Received: by 10.52.244.136 with SMTP id xg8mr2482977vdc.7.1386854791921; Thu, 12 Dec 2013 05:26:31 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.121.98 with SMTP id lj2ls503231qeb.45.gmail; Thu, 12 Dec 2013 05:26:31 -0800 (PST) X-Received: by 10.52.171.79 with SMTP id as15mr3128857vdc.1.1386854791805; Thu, 12 Dec 2013 05:26:31 -0800 (PST) Received: from mail-vb0-f44.google.com (mail-vb0-f44.google.com [209.85.212.44]) by mx.google.com with ESMTPS id a6si7687083vdp.78.2013.12.12.05.26.31 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 12 Dec 2013 05:26:31 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.44 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.212.44; Received: by mail-vb0-f44.google.com with SMTP id x8so268029vbf.17 for ; Thu, 12 Dec 2013 05:26:31 -0800 (PST) X-Received: by 10.52.171.227 with SMTP id ax3mr91058vdc.34.1386854791718; Thu, 12 Dec 2013 05:26:31 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp354247vcz; Thu, 12 Dec 2013 05:26:31 -0800 (PST) X-Received: by 10.43.103.67 with SMTP id dh3mr5779969icc.60.1386854791075; Thu, 12 Dec 2013 05:26:31 -0800 (PST) Received: from mail-ie0-f177.google.com (mail-ie0-f177.google.com [209.85.223.177]) by mx.google.com with ESMTPS id 9si24166248icd.80.2013.12.12.05.26.30 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 12 Dec 2013 05:26:31 -0800 (PST) Received-SPF: neutral (google.com: 209.85.223.177 is neither permitted nor denied by best guess record for domain of mporter@linaro.org) client-ip=209.85.223.177; Received: by mail-ie0-f177.google.com with SMTP id tp5so531736ieb.36 for ; Thu, 12 Dec 2013 05:26:30 -0800 (PST) X-Received: by 10.50.82.41 with SMTP id f9mr8840040igy.26.1386854790760; Thu, 12 Dec 2013 05:26:30 -0800 (PST) Received: from beef.ohporter.com (cpe-98-27-254-98.neo.res.rr.com. [98.27.254.98]) by mx.google.com with ESMTPSA id l7sm14983106igx.2.2013.12.12.05.26.28 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 12 Dec 2013 05:26:30 -0800 (PST) From: Matt Porter To: Felipe Balbi , Greg Kroah-Hartman , Kishon Vijay Abraham I , Rob Herring , Pawel Moll , Mark Rutland , Kumar Gala , Ian Campbell , Christian Daudt , Paul Zimmerman Cc: Tomasz Figa , Kamil Debski , Kyungmin Park , Russell King , Linux USB List , Linux ARM Kernel List , Linux Kernel Mailing List , Devicetree List , Linaro Patches Subject: [PATCH v5 6/9] usb: gadget: s3c-hsotg: get phy bus width from phy subsystem Date: Thu, 12 Dec 2013 08:26:07 -0500 Message-Id: <1386854770-2173-7-git-send-email-mporter@linaro.org> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1386854770-2173-1-git-send-email-mporter@linaro.org> References: <1386854770-2173-1-git-send-email-mporter@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mporter@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.44 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Adds support for querying the phy bus width from the generic phy subsystem. Configure UTMI bus width in GUSBCFG based on this value. Signed-off-by: Matt Porter Acked-by: Kishon Vijay Abraham I --- drivers/usb/gadget/s3c-hsotg.c | 14 +++++++++++++- drivers/usb/gadget/s3c-hsotg.h | 1 + 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c index e9683c2..168aaa9 100644 --- a/drivers/usb/gadget/s3c-hsotg.c +++ b/drivers/usb/gadget/s3c-hsotg.c @@ -144,6 +144,7 @@ struct s3c_hsotg_ep { * @regs: The memory area mapped for accessing registers. * @irq: The IRQ number we are using * @supplies: Definition of USB power supplies + * @phyif: PHY interface width * @dedicated_fifos: Set if the hardware has dedicated IN-EP fifos. * @num_of_eps: Number of available EPs (excluding EP0) * @debug_root: root directrory for debugfs. @@ -171,6 +172,7 @@ struct s3c_hsotg { struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsotg_supply_names)]; + u32 phyif; unsigned int dedicated_fifos:1; unsigned char num_of_eps; @@ -2276,7 +2278,7 @@ static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg) */ /* set the PLL on, remove the HNP/SRP and set the PHY */ - writel(GUSBCFG_PHYIf16 | GUSBCFG_TOutCal(7) | + writel(hsotg->phyif | GUSBCFG_TOutCal(7) | (0x5 << 10), hsotg->regs + GUSBCFG); s3c_hsotg_init_fifo(hsotg); @@ -3621,6 +3623,16 @@ static int s3c_hsotg_probe(struct platform_device *pdev) goto err_supplies; } + /* Set default UTMI width */ + hsotg->phyif = GUSBCFG_PHYIf16; + + /* + * If using the generic PHY framework, check if the PHY bus + * width is 8-bit and set the phyif appropriately. + */ + if (hsotg->phy && (phy_get_bus_width(phy) == 8)) + hsotg->phyif = GUSBCFG_PHYIf8; + if (hsotg->phy) phy_init(hsotg->phy); diff --git a/drivers/usb/gadget/s3c-hsotg.h b/drivers/usb/gadget/s3c-hsotg.h index d650b12..85f549f 100644 --- a/drivers/usb/gadget/s3c-hsotg.h +++ b/drivers/usb/gadget/s3c-hsotg.h @@ -55,6 +55,7 @@ #define GUSBCFG_HNPCap (1 << 9) #define GUSBCFG_SRPCap (1 << 8) #define GUSBCFG_PHYIf16 (1 << 3) +#define GUSBCFG_PHYIf8 (0 << 3) #define GUSBCFG_TOutCal_MASK (0x7 << 0) #define GUSBCFG_TOutCal_SHIFT (0) #define GUSBCFG_TOutCal_LIMIT (0x7)