[v4,0/3] Add logic to consolidate TRBs for Synopsys xHC

The Synopsys xHC has an internal TRB cache of size TRB_CACHE_SIZE for
each endpoint. The default value for TRB_CACHE_SIZE is 16 for SS and 8
for HS. The controller loads and updates the TRB cache from the
transfer ring in system memory whenever the driver issues a start
transfer or update transfer command.

For chained TRBs, the Synopsys xHC requires that the total amount of
bytes for all TRBs loaded in the TRB cache be greater than or equal to
1 MPS. Or the chain ends within the TRB cache (with a last TRB).

If this requirement is not met, the controller will not be able to
send or receive a packet and it will hang causing a driver timeout and
error.

This patch set adds logic to the XHCI driver to detect and prevent this
from happening along with the quirk to enable this logic for Synopsys
HAPS platform.

Based on Mathias's feedback on previous implementation where consolidation
was done in TRB cache, with this patch series the implementation is done
during mapping of the URB by consolidating the SG list into a temporary
buffer if the SG list buffer sizes within TRB_CACHE_SIZE is less than MPS.

Changes since v3:
 - Removed the dt-binding patch
 - Added new patch to pass the quirk as platform data
 - Modified the patch to set the quirk

Changes since v2:
 - Modified the xhci_unmap_temp_buffer function to unmap dma and c
   the dma flag
 - Removed RFC tag

Changes since v1:
 - Comments from Greg are addressed on [PATCH 4/4] and [PATCH 1/4]
 - Renamed the property and quirk as in other patches based on [PATCH 1/4]



Tejas Joglekar (3):
  usb: xhci: Set quirk for XHCI_SG_TRB_CACHE_SIZE_QUIRK
  usb: xhci: Use temporary buffer to consolidate SG
  usb: dwc3: Pass quirk as platform data

 drivers/usb/dwc3/host.c      |  14 ++++
 drivers/usb/host/xhci-plat.c |   3 +
 drivers/usb/host/xhci-ring.c |   2 +-
 drivers/usb/host/xhci.c      | 137 ++++++++++++++++++++++++++++++++++-
 drivers/usb/host/xhci.h      |   5 ++
 5 files changed, 159 insertions(+), 2 deletions(-)

Hi,
On 10/14/2020 2:07 PM, Sergei Shtylyov wrote:
> Hello!

> 

> On 13.10.2020 15:44, Tejas Joglekar wrote:

> 

>> This commit adds the platform device data to setup

>> the XHCI_SG_TRB_CACHE_SIZE_QUIRK quirk. DWC3 hosts

>> which are PCI devices does not use OF to create platform device

>> but create xhci-plat platform device runtime. So

>                                       ^ at

> 

>> this patch allow parent device to supply the quirk

> 

>    Allows.

> 

Noted.
>> through platform data.

>>

>> Signed-off-by: Tejas Joglekar <joglekar@synopsys.com>

>> ---

>>   drivers/usb/dwc3/host.c | 14 ++++++++++++++

>>   1 file changed, 14 insertions(+)

>>

>> diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c

>> index e195176580de..dd7c742333f7 100644

>> --- a/drivers/usb/dwc3/host.c

>> +++ b/drivers/usb/dwc3/host.c

>> @@ -11,6 +11,15 @@

>>   #include <linux/platform_device.h>

>>     #include "core.h"

>> +#include "../host/xhci-plat.h"

>> +

>> +static const struct xhci_plat_priv dwc3_pdata = {

>> +    .plat_start = NULL,

>> +    .init_quirk = NULL,

>> +    .suspend_quirk = NULL,

>> +    .resume_quirk = NULL,

> 

>    Why not rely on the compiler to fill these with zeros?

> 

Sure I will update
>> +    .quirks = XHCI_SG_TRB_CACHE_SIZE_QUIRK,

>> +};

>>     static int dwc3_host_get_irq(struct dwc3 *dwc)

>>   {

> [...]

> 

> MBR, Sergei


Thanks & Regards,
 Tejas Joglekar