From patchwork Wed Jul 13 00:35:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 591340 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3569EC433EF for ; Wed, 13 Jul 2022 00:35:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230140AbiGMAfz (ORCPT ); Tue, 12 Jul 2022 20:35:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229514AbiGMAfy (ORCPT ); Tue, 12 Jul 2022 20:35:54 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B4C98688A; Tue, 12 Jul 2022 17:35:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1657672554; x=1689208554; h=from:to:cc:subject:date:message-id:mime-version; bh=wP60QWyBV7Lv8G2MPVhFC5kEY3bi5afN3NB0xstza4I=; b=dNUpult6wNIkqN4b4F9fkdEtFEVtgCg7Tjaxt0cSfzpipxRP+5XIJ9xk NQPP+anLbPzjQYPpawqzrhtvxkOKd+MO0Lg9uHm9C14U24zZ6SwDepaZP c1kEbc9Wx/IrQNLsfHo+rTa+93MSfLGigVxYg1XWQQCI3pAO3HDBtgbhz U=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-01.qualcomm.com with ESMTP; 12 Jul 2022 17:35:53 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2022 17:35:53 -0700 Received: from nalasex01b.na.qualcomm.com (10.47.209.197) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 12 Jul 2022 17:35:36 -0700 Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 12 Jul 2022 17:35:36 -0700 From: Wesley Cheng To: , CC: , , , , Wesley Cheng Subject: [PATCH v2 0/5] Fix controller halt and endxfer timeout issues Date: Tue, 12 Jul 2022 17:35:18 -0700 Message-ID: <20220713003523.29309-1-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01b.na.qualcomm.com (10.47.209.197) Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Changes in v2: - Moved msleep() to before reading status register for halted state - Fixed kernel bot errors - Clearing DEP flags in __dwc3_stop_active_transfers() - Added Suggested-by tags and link references to previous discussions This patch series addresses some issues seen while testing with the latest soft disconnect implementation where EP events are allowed to process while the controller halt is occurring. #1 Since routines can now interweave, we can see that the soft disconnect can occur while conndone is being serviced. This leads to a controller halt timeout, as the soft disconnect clears the DEP flags, for which conndone interrupt handler will issue a __dwc3_ep_enable(ep0), that leads to re-issuing the set ep config command for every endpoint. #2 Function drivers can ask for a delayed_status phase, while it processes the received SETUP packet. This can lead to large delays when handling the soft disconnect routine. To improve the timing, forcefully send the status phase, as we are going to disconnect from the host. #3 Ensure that local interrupts are left enabled, so that EP0 events can be processed while the soft disconnect/dequeue is happening. #4 Modify the DWC3_EP_DELAY_STOP flag management so that if these flags were set before soft disconnect, that the disconnect routine will be able to properly issue the endxfer command. #5 Since EP0 events can occur during controller halt, it may increase the time needed for the controller to fully stop. Wesley Cheng (5): usb: dwc3: Do not service EP0 and conndone events if soft disconnected usb: dwc3: gadget: Force sending delayed status during soft disconnect usb: dwc3: gadget: Adjust IRQ management during soft disconnect/connect usb: dwc3: Allow end transfer commands to be sent during soft disconnect usb: dwc3: gadget: Increase DWC3 controller halt timeout drivers/usb/dwc3/ep0.c | 9 +++++---- drivers/usb/dwc3/gadget.c | 33 +++++++++++++++++++++++---------- 2 files changed, 28 insertions(+), 14 deletions(-)