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Fri, 24 Jan 2025 10:53:23 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 4485cm9h0p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 24 Jan 2025 10:53:23 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 50OArN3M016309; Fri, 24 Jan 2025 10:53:23 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com ([10.213.97.252]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 50OArMiu016308 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 24 Jan 2025 10:53:23 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 4047106) id 4783D55C; Fri, 24 Jan 2025 16:23:22 +0530 (+0530) From: Viken Dadhaniya To: andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, broonie@kernel.or, andersson@kernel.org, konradybcio@kernel.org, johan+linaro@kernel.org, dianders@chromium.org, agross@kernel.org, linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org Cc: quic_msavaliy@quicinc.com, quic_anupkulk@quicinc.com, Viken Dadhaniya Subject: [PATCH v2 4/8] dt-bindings: serial: Add support for selecting data transfer mode Date: Fri, 24 Jan 2025 16:23:05 +0530 Message-Id: <20250124105309.295769-5-quic_vdadhani@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250124105309.295769-1-quic_vdadhani@quicinc.com> References: <20250124105309.295769-1-quic_vdadhani@quicinc.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 4hAwMS46lxGbZ5Yh8_Hqmgk7biIS9RPK X-Proofpoint-GUID: 4hAwMS46lxGbZ5Yh8_Hqmgk7biIS9RPK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-24_04,2025-01-23_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 mlxscore=0 impostorscore=0 malwarescore=0 adultscore=0 suspectscore=0 bulkscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501240079 Data transfer mode is fixed by TrustZone (TZ), which currently restricts developers from modifying the transfer mode from the APPS side. Document the 'qcom,xfer-mode' properties to select the data transfer mode, either GPI DMA (Generic Packet Interface) or non-GPI mode (PIO/CPU DMA). UART controller can operate in one of two modes based on the 'qcom,xfer-mode' property, and the firmware is loaded accordingly. Co-developed-by: Mukesh Kumar Savaliya Signed-off-by: Mukesh Kumar Savaliya Signed-off-by: Viken Dadhaniya --- v1 -> v2: - Drop 'qcom,load-firmware' property and add 'firmware-name' property in qup common driver. - Update commit log. v1 Link: https://lore.kernel.org/linux-kernel/20241204150326.1470749-4-quic_vdadhani@quicinc.com/ --- --- .../devicetree/bindings/serial/qcom,serial-geni-qcom.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml index dd33794b3534..383773b32e47 100644 --- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml @@ -56,6 +56,13 @@ properties: reg: maxItems: 1 + qcom,xfer-mode: + description: Set the value to 1 for non-GPI (FIFO/CPU DMA) mode and 3 for GPI DMA mode. + The default mode is FIFO. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 3] + + required: - compatible - clocks @@ -82,5 +89,6 @@ examples: interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>; interconnect-names = "qup-core", "qup-config"; + qcom,xfer-mode = <1>; }; ...