From patchwork Wed Jan 22 14:10:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 859359 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 564D52144D5; Wed, 22 Jan 2025 14:13:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737555217; cv=none; b=J5muDlEdSRjUyKsG6TCwNG/fkG1asJiNihATiIKOZdF8/UQK/mQUZ8KlXGvhZ+9Xltb1R2UPnE8vXT7wzMkccY9mSKp7rYB09NtjlMn1n2ce9LpsKx3AhzpP1/d+6DAVRQhKYO2HBYoVPcbMS/IMT/zkXpDZddoiz7hMdXjtf8k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737555217; c=relaxed/simple; bh=0jVFHs4X/VDOkudXmZjUOvvinh/tLonYe6zOt+Gkmr8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=k3Toaa0WMiY0qFLFgc4fWHbsJC8GSxU3VCkDgvtwOSYBpo3WEYJ2bsm3KR3OPe8CUXwIxoIH29TemWZXhdBfslOk7HKWHf+NmWL+JCDFvZrqlZZdbGq9zCVQJPSqZ1V7/f+ZyW2WgQTduKoUP+O+jCA9bqmb7mw+cDGlI63SLuY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=aAoAtHhH; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="aAoAtHhH" Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 50M9W6H7016234; Wed, 22 Jan 2025 15:13:15 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= t53J5ySJvjZ1mWhdFkUh4HPCxy4CyKe2Xlf/1xsbpAU=; b=aAoAtHhHybgNy8vP fMxMU/E2n+BtU70eFFpGGNQ/IjND6gyJeYk0Eawi9C0ATNOMS1bC3E7ix7obkdri 7KnizH9lWS0YHOycNWNs5KwA6vOS8FyKMZhtpjXMXyYE3qqmZuNuJzP+fRqKJ+nt RLgiSiqUkMSnXBHau2JLLM4O6HFVE8teYSUhifIBsj8z/usXctv87yzt9+MDBhTM 44mbK+y10v6QoFShW4MaXyDzjp4A500sEhp1/XHKDAhq72nen2KAU1WPrN5p6f7t N5U13c69oT1Ve7GdVyYYj9Mqk5g7XrmX99yIuWuCnJuinRNPC7nUFp8ldmDtORAB 4Svj3A== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 44arn2t5rv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 22 Jan 2025 15:13:15 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 56AD740057; Wed, 22 Jan 2025 15:11:43 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 89841299486; Wed, 22 Jan 2025 15:10:44 +0100 (CET) Received: from localhost (10.48.87.62) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Wed, 22 Jan 2025 15:10:44 +0100 From: To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Philipp Zabel , Maxime Coquelin , Greg Kroah-Hartman , Arnd Bergmann , Catalin Marinas , Will Deacon CC: , , , , , , Subject: [PATCH 7/9] arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board Date: Wed, 22 Jan 2025 15:10:35 +0100 Message-ID: <20250122141037.953934-8-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250122141037.953934-1-patrice.chotard@foss.st.com> References: <20250122141037.953934-1-patrice.chotard@foss.st.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SAFCAS1NODE2.st.com (10.75.90.13) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-22_06,2025-01-22_02,2024-11-22_01 From: Patrice Chotard Add SPI NOR flash nor support on stm32mp257f-ev1 board. Signed-off-by: Patrice Chotard --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 1b88485a62a1..fe5577fff4d3 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -80,6 +80,11 @@ fw@80000000 { reg = <0x0 0x80000000 0x0 0x4000000>; no-map; }; + + mm_ospi1: mm-ospi@60000000 { + reg = <0x0 0x60000000 0x0 0x10000000>; + no-map; + }; }; }; @@ -190,6 +195,34 @@ &i2c8 { status = "disabled"; }; +&ommanager { + memory-region = <&mm_ospi1>; + memory-region-names = "mm_ospi1"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&ospi_port1_clk_pins_a + &ospi_port1_io03_pins_a + &ospi_port1_cs0_pins_a>; + pinctrl-1 = <&ospi_port1_clk_sleep_pins_a + &ospi_port1_io03_sleep_pins_a + &ospi_port1_cs0_sleep_pins_a>; + status = "okay"; + + spi@40430000 { + #address-cells = <1>; + #size-cells = <0>; + memory-region = <&mm_ospi1>; + status = "okay"; + + flash0: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; + }; +}; + &rtc { status = "okay"; };