diff mbox series

[4/7] spi: zynqmp-gqspi: Refactor out controller initialization

Message ID 20250116232118.2694169-5-sean.anderson@linux.dev
State New
Headers show
Series None | expand

Commit Message

Sean Anderson Jan. 16, 2025, 11:21 p.m. UTC 
In preparation for having multiple SPI busses, refactor out the
controller initialization into a separate function. No functional change
intended.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---

 drivers/spi/spi-zynqmp-gqspi.c | 42 +++++++++++++++++++++-------------
 1 file changed, 26 insertions(+), 16 deletions(-)
diff mbox series

Patch

diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c
index a1233897dc88..d78e114e17e0 100644
--- a/drivers/spi/spi-zynqmp-gqspi.c
+++ b/drivers/spi/spi-zynqmp-gqspi.c
@@ -1253,6 +1253,29 @@  static const struct spi_controller_mem_ops zynqmp_qspi_mem_ops = {
 	.exec_op = zynqmp_qspi_exec_op,
 };
 
+static int zynqmp_qspi_register_ctlr(struct zynqmp_qspi *xqspi,
+				     struct spi_controller *ctlr)
+{
+	int ret;
+
+	if (!ctlr)
+		return 0;
+
+	ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD |
+		SPI_TX_DUAL | SPI_TX_QUAD;
+	ctlr->max_speed_hz = xqspi->speed_hz;
+	ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
+	ctlr->mem_ops = &zynqmp_qspi_mem_ops;
+	ctlr->setup = zynqmp_qspi_setup_op;
+	ctlr->auto_runtime_pm = true;
+
+	ret = devm_spi_register_controller(xqspi->dev, ctlr);
+	if (ret)
+		dev_err_probe(xqspi->dev, ret, "could not register %pOF\n",
+			      ctlr->dev.of_node);
+	return ret;
+}
+
 /**
  * zynqmp_qspi_probe - Probe method for the QSPI driver
  * @pdev:	Pointer to the platform_device structure
@@ -1329,12 +1352,8 @@  static int zynqmp_qspi_probe(struct platform_device *pdev)
 		goto clk_dis_all;
 	}
 
-	ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD |
-		SPI_TX_DUAL | SPI_TX_QUAD;
-	ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2;
-	xqspi->speed_hz = ctlr->max_speed_hz;
-
 	/* QSPI controller initializations */
+	xqspi->speed_hz = clk_get_rate(xqspi->refclk) / 2;
 	ret = zynqmp_qspi_init_hw(xqspi);
 	if (ret)
 		goto clk_dis_all;
@@ -1368,18 +1387,9 @@  static int zynqmp_qspi_probe(struct platform_device *pdev)
 		ctlr->num_chipselect = num_cs;
 	}
 
-	ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
-	ctlr->mem_ops = &zynqmp_qspi_mem_ops;
-	ctlr->setup = zynqmp_qspi_setup_op;
-	ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
-	ctlr->dev.of_node = np;
-	ctlr->auto_runtime_pm = true;
-
-	ret = devm_spi_register_controller(&pdev->dev, ctlr);
-	if (ret) {
-		dev_err(&pdev->dev, "spi_register_controller failed\n");
+	ret = zynqmp_qspi_register_ctlr(xqspi, ctlr);
+	if (ret)
 		goto clk_dis_all;
-	}
 
 	pm_runtime_mark_last_busy(&pdev->dev);
 	pm_runtime_put_autosuspend(&pdev->dev);