From patchwork Tue Dec 24 17:06:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 853813 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66F02214A64; Tue, 24 Dec 2024 17:08:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735060102; cv=none; b=iXWOLpVcyRyoNhn1pU/QoBIney+q3zDQMc86Zt1zp/ji0tgBIELcpP40DLvd04zslkeWBlej4xByr/90LrSdQW+GLYB3dzH4rNEFsmAa2OPAkqMJdBsvm2rgApTPzGazOohb+8UqmBgLV35UKnEgkiMuCmPSQ2eyo8R8K86PUso= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735060102; c=relaxed/simple; bh=lJnbYwmh0CfUGXXLNC9HvskaNuCRIpWDFQJMfRRgNXs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oytaAKzhBQiqWLeHlY1fHwwY0+ia35LHX11DyIIAvimtT9mpaYRz3QFLSXyQFiR318xTXxwbLA7ArWRb+tEjrDqd0AtR1tRWR0qrI5f3GXrPxRrALGmHlToUibqzhdWkiBsGC2UNahlBsWL1Q4u9DESpuLf2vLjJ7lfndb7YKik= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=EnXAhlX1; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="EnXAhlX1" Received: by mail.gandi.net (Postfix) with ESMTPSA id 547A240002; Tue, 24 Dec 2024 17:08:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1735060098; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NBTD2mRgBbZjy9x9uQ4Dp69bdEkIazUsIudyacF/NfI=; b=EnXAhlX18mEAm2ClNAdRGNfzWxGbsjWtH761PJcO0mIYt8k1lsvOXebEJJIynhUQQtTWxc Zc4bG7QhgeKwCU8cfSWL6JDYOlDuztweL/QBT6bfRKm2D0MCYrLknAT+xyJhw13E57UrVc Va0rQFahAPjKmpCKD3eocvaww/5+xD2qz6psnCJ54OMHKg10XGDOa+zCnLdTH0EcoNuanZ 3mwiV2cA0qJlqVgyC/685Fupu9E79PcIFTbCqAjh2n+3yvjjHenbCnnSjpK+22vtWRp70Q rPIw8XZJRQyxWopqgPJG9PnV2kD8zzwZNULTjjmOwuMyY9/18Xk9cOYgFQZR7g== From: Miquel Raynal Date: Tue, 24 Dec 2024 18:06:10 +0100 Subject: [PATCH v2 25/27] mtd: spinand: winbond: Update the *JW chip definitions Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241224-winbond-6-11-rc1-quad-support-v2-25-ad218dbc406f@bootlin.com> References: <20241224-winbond-6-11-rc1-quad-support-v2-0-ad218dbc406f@bootlin.com> In-Reply-To: <20241224-winbond-6-11-rc1-quad-support-v2-0-ad218dbc406f@bootlin.com> To: Mark Brown , Sanjay R Mehta , Serge Semin , Han Xu , Conor Dooley , Daire McNamara , Matthias Brugger , AngeloGioacchino Del Regno , Haibo Chen , Yogesh Gaur , Heiko Stuebner , Michal Simek , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Jacky Huang , Shan-Chun Hung , Chin-Ting Kuo , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Joel Stanley , Andrew Jeffery , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Maxime Coquelin , Alexandre Torgue , Raju Rangoju Cc: Thomas Petazzoni , Steam Lin , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, linux-stm32@st-md-mailman.stormreply.com, stable+noautosel@kernel.org X-Mailer: b4 0.15-dev X-GND-Sasl: miquel.raynal@bootlin.com W25N01JW and W25N02JW use a different technology with higher frequencies supported (up to 166MHz). There is one drawback though, the slowest READ_FROM_CACHE command cannot run above 54MHz. Because of that, we need to set a limit for these chips on the basic READ_FROM_CACHE variant. Duplicating this list is not a problem because these chips have DTR support, and the list of supported variants will diverge from all the other chips when adding support for it. Cc: # New feature being added Signed-off-by: Miquel Raynal --- drivers/mtd/nand/spi/winbond.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c index fb6fee71bcb6d00c5ae7a5578b57c8c3725c7391..97517d495e57a6e9e616ed7e66b4a8e9fc1fe62a 100644 --- a/drivers/mtd/nand/spi/winbond.c +++ b/drivers/mtd/nand/spi/winbond.c @@ -10,6 +10,7 @@ #include #include #include +#include #define SPINAND_MFR_WINBOND 0xEF @@ -17,6 +18,14 @@ #define W25N04KV_STATUS_ECC_5_8_BITFLIPS (3 << 4) +static SPINAND_OP_VARIANTS(read_cache_dtr_variants, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_FAST_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(0, 1, NULL, 0, 54 * HZ_PER_MHZ)); + static SPINAND_OP_VARIANTS(read_cache_variants, SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), @@ -194,7 +203,7 @@ static const struct spinand_info winbond_spinand_table[] = { SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbc, 0x21), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), NAND_ECCREQ(1, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + SPINAND_INFO_OP_VARIANTS(&read_cache_dtr_variants, &write_cache_variants, &update_cache_variants), 0, @@ -223,7 +232,7 @@ static const struct spinand_info winbond_spinand_table[] = { SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbf, 0x22), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 2, 1), NAND_ECCREQ(1, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + SPINAND_INFO_OP_VARIANTS(&read_cache_dtr_variants, &write_cache_variants, &update_cache_variants), 0,