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Wed, 18 Oct 2023 16:34:02 -0500 From: Amit Kumar Mahapatra To: , , , , , CC: , , , , , , , , , , , , Amit Kumar Mahapatra Subject: [PATCH v9 6/8] spi: spi-zynqmp-gqspi: Add stacked memories support in GQSPI driver Date: Thu, 19 Oct 2023 03:03:26 +0530 Message-ID: <20231018213328.40131-7-amit.kumar-mahapatra@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231018213328.40131-1-amit.kumar-mahapatra@amd.com> References: <20231018213328.40131-1-amit.kumar-mahapatra@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB78:EE_|PH8PR12MB8607:EE_ X-MS-Office365-Filtering-Correlation-Id: 1ac334f6-9144-4446-730f-08dbd021f634 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AJV0jfUFDGdhK3xzA3YfqyiTcOqJPg7RDjauNoxs6G68SWDAbo8Hgzw1Rw4Oi7/GsUVMWaikspuhzleTn7bc4GR7lZ5pU10bc/vmgIXG3SgzQRH2UuF4QBpsX4nN6qjpqiiKg3a6sHMa5WrRXSRX4R21AyW4BleYS5nbRglJAzZI50qI0GYHmA8jhgMguoNWJM/+WoSCDVUHfYQIaoO8ZryEeRZ3mwfmRXSkbsk8nVNj02fMlQcmiyBIvK0Mh88H7VCSsNQ5rWjLhGDhCph8l9C9Ga7CuaA1DKKDrAQC/UOuRlmDVpmrhIC1ULOlX/ynt5iRfif/GVgQcTzzfMU5j191X+bo9q3EUCYqASi8qC+ET3Ijb1HkgLPnYrrFJwmQIKrfV4BOMF4j8EayEyknAnXjYLsqcdPe7xKqC1mnH9OpYtz2EJtkz+SKMSywbCePRyp4efiyO16c4yjGlSWPgL43bWT3enW3n/dDQeQw0yl2VZavZSLAlEEMmgT20SEvXuFQ5tt+4gQHndZA9pFAU/WOYK57YgNojzPMfITw4uMf0K0JS5y9oKMLxgklcQoYx41cBe2agDyy0Tq15jBpl+xYVntiAeZFwSlpHA3ki85jXttnZiwmmktYNT5VFApQb83RgHxIonU93EAGz9XC7a3+NyK26T8fvTXxa5+OG1Dr43NJGogE+WDiiu5ierEu5I7vSJEyE+CiRVAki/rBruqLkDLL/ByoCdmczC3dqC+a9Uf3CwEar9lN6gDLGG7g29RqbfbAtsGXzxT/7orDWA== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Update the driver to assert/de-assert the appropriate chip select as per the bits set in qspi->cs_index_mask. Signed-off-by: Amit Kumar Mahapatra --- drivers/spi/spi-zynqmp-gqspi.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index 9a46b2478f4e..c5d12ddd4ab3 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c @@ -154,6 +154,9 @@ #define GQSPI_FREQ_100MHZ 100000000 #define GQSPI_FREQ_150MHZ 150000000 +#define GQSPI_SELECT_LOWER_CS BIT(0) +#define GQSPI_SELECT_UPPER_CS BIT(1) + #define SPI_AUTOSUSPEND_TIMEOUT 3000 enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA}; @@ -465,15 +468,17 @@ static void zynqmp_qspi_chipselect(struct spi_device *qspi, bool is_high) genfifoentry |= GQSPI_GENFIFO_MODE_SPI; + if (qspi->cs_index_mask & GQSPI_SELECT_UPPER_CS) { + zynqmp_gqspi_selectslave(xqspi, + GQSPI_SELECT_FLASH_CS_UPPER, + GQSPI_SELECT_FLASH_BUS_LOWER); + } else if (qspi->cs_index_mask & GQSPI_SELECT_LOWER_CS) { + zynqmp_gqspi_selectslave(xqspi, + GQSPI_SELECT_FLASH_CS_LOWER, + GQSPI_SELECT_FLASH_BUS_LOWER); + } + genfifoentry |= xqspi->genfifobus; if (!is_high) { - if (!spi_get_chipselect(qspi, 0)) { - xqspi->genfifobus = GQSPI_GENFIFO_BUS_LOWER; - xqspi->genfifocs = GQSPI_GENFIFO_CS_LOWER; - } else { - xqspi->genfifobus = GQSPI_GENFIFO_BUS_UPPER; - xqspi->genfifocs = GQSPI_GENFIFO_CS_UPPER; - } - genfifoentry |= xqspi->genfifobus; genfifoentry |= xqspi->genfifocs; genfifoentry |= GQSPI_GENFIFO_CS_SETUP; } else {