From patchwork Fri Jun 23 20:30:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varshini Rajendran X-Patchwork-Id: 697163 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 564B5C04A94 for ; Fri, 23 Jun 2023 20:46:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230229AbjFWUqd (ORCPT ); Fri, 23 Jun 2023 16:46:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232484AbjFWUqN (ORCPT ); Fri, 23 Jun 2023 16:46:13 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0AFE930FC; Fri, 23 Jun 2023 13:44:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1687553093; x=1719089093; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=x1O902oFsQeoK9oVLCWEt+1yrZVqoxGg87zjZmWY034=; b=kNfdiMHcoaAdTn6nH+86LE+oBrGnMseVtLOhFXU6Kji/VqEpY4D+ogIK U4QclNu9U7Q/UfyOjYD28OMp3ceyMtbq4J017Oa7r+XgObdhz6bmyNnQP GnRMvrAN9fQzHdr/W47OAoQ3tJVOX8Mv+2Bz+Ce+cR8VbG3jEPj3H5F27 ZQAg7bGPyRRN8Rt44EBSDp2ftIMyRsi1XQADV8oOqZj8PFGxWeskGyS2d F24abUDrXnCLrvBE604PUJ2Lj84nqtYTyqaiyaF8EAyPnEC36rxnjqoHS UAWSRmZpaJgZgk3MtMRb+3stouwIfSQRR61zP2SJJnq89sI2MLqwIhROa Q==; X-IronPort-AV: E=Sophos;i="6.01,153,1684825200"; d="scan'208";a="217419442" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Jun 2023 13:43:54 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 23 Jun 2023 13:43:37 -0700 Received: from che-lt-i67070.amer.actel.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 23 Jun 2023 13:43:08 -0700 From: Varshini Rajendran To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH v2 25/45] dt-bindings: atmel-nand: add microchip,sam9x7-pmecc Date: Sat, 24 Jun 2023 02:00:36 +0530 Message-ID: <20230623203056.689705-26-varshini.rajendran@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230623203056.689705-1-varshini.rajendran@microchip.com> References: <20230623203056.689705-1-varshini.rajendran@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add microchip,sam9x7-pmecc to DT bindings documentation. Signed-off-by: Varshini Rajendran --- Documentation/devicetree/bindings/mtd/atmel-nand.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt index 50645828ac20..9c9dfab38fdf 100644 --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt @@ -56,6 +56,7 @@ Required properties: "atmel,sama5d4-pmecc" "atmel,sama5d2-pmecc" "microchip,sam9x60-pmecc" + "microchip,sam9x7-pmecc" - reg: should contain 2 register ranges. The first one is pointing to the PMECC block, and the second one to the PMECC_ERRLOC block.