From patchwork Thu Feb 9 20:02:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 652654 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22F2EC636D3 for ; Thu, 9 Feb 2023 20:04:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230165AbjBIUEq (ORCPT ); Thu, 9 Feb 2023 15:04:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230178AbjBIUEd (ORCPT ); Thu, 9 Feb 2023 15:04:33 -0500 Received: from relay.smtp-ext.broadcom.com (lpdvsmtp11.broadcom.com [192.19.166.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF2E06ADED; Thu, 9 Feb 2023 12:04:27 -0800 (PST) Received: from mail-lvn-it-01.lvn.broadcom.net (mail-lvn-it-01.lvn.broadcom.net [10.75.146.107]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id 8871BC0000E6; Thu, 9 Feb 2023 12:04:27 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 8871BC0000E6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1675973067; bh=Gi26RH22Ek6kn5CuXffuZpkYQjBESqtQ2urxF8mIgbw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mEXaJlt59bTadq82NgG3cm2SlBexDv9cNN5m8V9WG8FcFLniaAux6gC2RIAOAlocY jvv2DZB/+sr+2bRYveUzcIwpREg5j075wXdavATEbez+OGprTn/zIOD/nK5/BzkgHy VfcCCSc9C37FjDECuge2NH3YClH01eKq3TDITuZw= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.75.138.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPS id 86D3318041CAC6; Thu, 9 Feb 2023 12:04:27 -0800 (PST) Received: by bcacpedev-irv-3.lvn.broadcom.net (Postfix, from userid 28376) id D466A101B76; Thu, 9 Feb 2023 12:04:20 -0800 (PST) From: William Zhang To: Linux SPI List , Broadcom Kernel List Cc: f.fainelli@gmail.com, dregan@mail.com, joel.peshkin@broadcom.com, dan.beygelman@broadcom.com, anand.gore@broadcom.com, kursad.oney@broadcom.com, tomer.yacoby@broadcom.com, jonas.gorski@gmail.com, William Zhang , Mark Brown , linux-kernel@vger.kernel.org Subject: [PATCH v4 13/15] spi: bcm63xx-hsspi: Disable spi mem dual io read op support Date: Thu, 9 Feb 2023 12:02:44 -0800 Message-Id: <20230209200246.141520-14-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20230209200246.141520-1-william.zhang@broadcom.com> References: <20230209200246.141520-1-william.zhang@broadcom.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org In general the controller supports SPI dual mode operation but the particular SPI flash dual io read op switches from single mode in cmd phase to dual mode in address and data phase. This is not compatible with prepend operation where cmd and address are sent out through the prepend buffer and they must use same the number of io pins. This patch disables these SPI flash dual io read ops through the mem_ops supports_op interface. This makes sure the SPI flash driver selects the compatible read ops at run time. Signed-off-by: William Zhang --- (no changes since v3) Changes in v3: - Replace hard-coded opcode with SPINOR_OP definition Changes in v2: - Remove the code that uses the deprecated flag use_cs_workaround - Always disable dual io read ops as prepend is the default mode drivers/spi/spi-bcm63xx-hsspi.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c index 6a289deb5848..1e9e906d297c 100644 --- a/drivers/spi/spi-bcm63xx-hsspi.c +++ b/drivers/spi/spi-bcm63xx-hsspi.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include #include #include @@ -682,6 +684,26 @@ static int bcm63xx_hsspi_transfer_one(struct spi_master *master, return 0; } +static bool bcm63xx_hsspi_mem_supports_op(struct spi_mem *mem, + const struct spi_mem_op *op) +{ + if (!spi_mem_default_supports_op(mem, op)) + return false; + + /* Controller doesn't support spi mem dual io mode */ + if ((op->cmd.opcode == SPINOR_OP_READ_1_2_2) || + (op->cmd.opcode == SPINOR_OP_READ_1_2_2_4B) || + (op->cmd.opcode == SPINOR_OP_READ_1_2_2_DTR) || + (op->cmd.opcode == SPINOR_OP_READ_1_2_2_DTR_4B)) + return false; + + return true; +} + +static const struct spi_controller_mem_ops bcm63xx_hsspi_mem_ops = { + .supports_op = bcm63xx_hsspi_mem_supports_op, +}; + static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id) { struct bcm63xx_hsspi *bs = (struct bcm63xx_hsspi *)dev_id; @@ -779,6 +801,7 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) mutex_init(&bs->msg_mutex); init_completion(&bs->done); + master->mem_ops = &bcm63xx_hsspi_mem_ops; master->dev.of_node = dev->of_node; if (!dev->of_node) master->bus_num = HSSPI_BUS_NUM;