From patchwork Mon Aug 8 06:46:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naga Sureshkumar Relli X-Patchwork-Id: 596211 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 552A6C25B0E for ; Mon, 8 Aug 2022 06:46:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229688AbiHHGql (ORCPT ); Mon, 8 Aug 2022 02:46:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234484AbiHHGql (ORCPT ); Mon, 8 Aug 2022 02:46:41 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5751C101CA; Sun, 7 Aug 2022 23:46:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1659941200; x=1691477200; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=k48ZxfqlHPtjRTRclgEvPB8AlCuk8oX0sn265mzICoM=; b=KmBMRmqDrvm2UlLJLgA1XpCfrdEznBg3ELMwNK6Ano053xmLsc5MtbhK FNBnpPEtDigfGYreD6mGJDPxLyxf5SCFEHHN2CvogU/XsyGnv1nvu0GLJ U1wkH+XMyvdszG5FHc0wvFd5HLVQCTjf7Hr1IwdPCP8GcmuchTSPJMT2p kW8JM21oVXIVGNO0eNRiSsVkHlmQuNrY6n0NpU/hrwBo2P+5YlX9szwvb SyMC/Zx9eGjb+R9hfEmCanO0UfXOyW9cAPXySaB1Qcqo0G88Vcs5vSWO0 1amZgKg8HwJUkt6i0pCaystKbsF31u7hMtop26aSGCoGC7SsifMUtQMMJ Q==; X-IronPort-AV: E=Sophos;i="5.93,221,1654585200"; d="scan'208";a="107987890" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Aug 2022 23:46:39 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Sun, 7 Aug 2022 23:46:38 -0700 Received: from microchip-OptiPlex-5040.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Sun, 7 Aug 2022 23:46:35 -0700 From: Naga Sureshkumar Relli To: , , , CC: , , , , Naga Sureshkumar Relli , Krzysztof Kozlowski Subject: [PATCH v4 2/4] spi: dt-binding: add coreqspi as a fallback for mpfs-qspi Date: Mon, 8 Aug 2022 12:16:01 +0530 Message-ID: <20220808064603.1174906-3-nagasuresh.relli@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220808064603.1174906-1-nagasuresh.relli@microchip.com> References: <20220808064603.1174906-1-nagasuresh.relli@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Microchip's PolarFire SoC QSPI IP core is based on coreQSPI, so add coreqspi as a fallback to mpfs-qspi. Signed-off-by: Naga Sureshkumar Relli Reviewed-by: Conor Dooley Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/spi/microchip,mpfs-spi.yaml | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml index a47d4923b51b..1051690e3753 100644 --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml @@ -18,10 +18,12 @@ allOf: properties: compatible: - enum: - - microchip,mpfs-spi - - microchip,mpfs-qspi - - microchip,coreqspi-rtl-v2 # FPGA QSPI + oneOf: + - items: + - const: microchip,mpfs-qspi + - const: microchip,coreqspi-rtl-v2 + - const: microchip,coreqspi-rtl-v2 #FPGA QSPI + - const: microchip,mpfs-spi reg: maxItems: 1