From patchwork Tue Jul 13 13:05:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Apurva Nandan X-Patchwork-Id: 475015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F3AEC07E96 for ; Tue, 13 Jul 2021 13:06:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 727906128C for ; Tue, 13 Jul 2021 13:06:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236222AbhGMNJX (ORCPT ); Tue, 13 Jul 2021 09:09:23 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:44090 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236616AbhGMNJX (ORCPT ); Tue, 13 Jul 2021 09:09:23 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16DD6NBW010788; Tue, 13 Jul 2021 08:06:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1626181583; bh=Z+dB4EvIxzpNpYXg02AgomR/hSRcWS9Lo0ZQW7fNDtc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Oo0S+EXbHEbn2R/Gnz7WiTH5wedw8ONfFwwU9qXVakYoSvaMbphvjBJXxL6kR6/I1 QT1h1ANyBOncumQIn/knRs183Ir04iaoJoJh3yCyb1YIRyYbKAlw2nc2gvjOegZ8b4 at82K3v8yAuLpQrqpgU1pl9DrNZmBi9Rwdw8/EDQ= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16DD6Nqe004963 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 13 Jul 2021 08:06:23 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 13 Jul 2021 08:06:23 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 13 Jul 2021 08:06:23 -0500 Received: from LT5CD112GSQZ.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16DD5daI109825; Tue, 13 Jul 2021 08:06:19 -0500 From: Apurva Nandan To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mark Brown , Patrice Chotard , Boris Brezillon , , , CC: Apurva Nandan , Pratyush Yadav Subject: [PATCH 08/13] mtd: spinand: Reject 8D-8D-8D op_templates if octal_dtr_enale() is missing in manufacturer_op Date: Tue, 13 Jul 2021 13:05:33 +0000 Message-ID: <20210713130538.646-9-a-nandan@ti.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20210713130538.646-1-a-nandan@ti.com> References: <20210713130538.646-1-a-nandan@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The SPI NAND core doesn't know how to switch the flash to Octal DTR mode (i.e. which operations to perform). If the manufacturer hasn't implemented the octal_dtr_enable() manufacturer_op, the SPI NAND core wouldn't be able to switch to 8D-8D-8D mode and will also not be able to run in 1S-1S-1S mode due to already selected 8D-8D-8D read/write cache op_templates. So, avoid choosing a Octal DTR SPI op_template for read_cache, write_cache and update_cache operations, if the manufacturer_op octal_dtr_enable() is missing. Signed-off-by: Apurva Nandan --- drivers/mtd/nand/spi/core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 19d8affac058..8711e887b795 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -1028,6 +1028,8 @@ static int spinand_manufacturer_match(struct spinand_device *spinand, if (id[0] != manufacturer->id) continue; + spinand->manufacturer = manufacturer; + ret = spinand_match_and_init(spinand, manufacturer->chips, manufacturer->nchips, @@ -1035,7 +1037,6 @@ static int spinand_manufacturer_match(struct spinand_device *spinand, if (ret < 0) continue; - spinand->manufacturer = manufacturer; return 0; } return -ENOTSUPP; @@ -1097,6 +1098,10 @@ spinand_select_op_variant(struct spinand_device *spinand, unsigned int nbytes; int ret; + if (spinand_op_is_octal_dtr(&op) && + !spinand->manufacturer->ops->octal_dtr_enable) + continue; + nbytes = nanddev_per_page_oobsize(nand) + nanddev_page_size(nand);