From patchwork Tue Mar 16 11:14:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seiya Wang X-Patchwork-Id: 403715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3019BC2BB4D for ; Tue, 16 Mar 2021 11:16:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 167166502D for ; Tue, 16 Mar 2021 11:16:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237243AbhCPLQR (ORCPT ); Tue, 16 Mar 2021 07:16:17 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:54413 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233127AbhCPLPr (ORCPT ); Tue, 16 Mar 2021 07:15:47 -0400 X-UUID: 72df0c343868459cb5dc24a45721ee02-20210316 X-UUID: 72df0c343868459cb5dc24a45721ee02-20210316 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2049234079; Tue, 16 Mar 2021 19:15:43 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 16 Mar 2021 19:15:41 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 16 Mar 2021 19:15:41 +0800 From: Seiya Wang To: Rob Herring , Matthias Brugger CC: Jonathan Cameron , Lars-Peter Clausen , Peter Meerwald-Stadler , Ulf Hansson , Chunfeng Yun , Kishon Vijay Abraham I , Vinod Koul , Greg Kroah-Hartman , Mark Brown , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Enric Balletbo i Serra , Hsin-Yi Wang , Seiya Wang , Fabien Parent , Sean Wang , Zhiyong Tao , Chaotian Jing , Wenbin Mei , Stanley Chu , Bayi Cheng , Chuanhong Guo , , , , , , , , , , Subject: [PATCH 08/10] dt-bindings: phy: Add compatible for Mediatek MT8195 Date: Tue, 16 Mar 2021 19:14:41 +0800 Message-ID: <20210316111443.3332-9-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20210316111443.3332-1-seiya.wang@mediatek.com> References: <20210316111443.3332-1-seiya.wang@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: E403C581C9AB4B436BEFED640EB0C314C96044C875937C9663CAB78296373CF32000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This commit adds dt-binding documentation of UFS M-Phy for Mediatek MT8195 SoC Platform. Signed-off-by: Seiya Wang --- Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml index 3a9be82e7f13..5235b1a0d188 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml @@ -22,6 +22,7 @@ properties: pattern: "^ufs-phy@[0-9a-f]+$" compatible: + enum: mediatek,mt8195-ufsphy const: mediatek,mt8183-ufsphy reg: