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[92.34.215.146]) by smtp.gmail.com with ESMTPSA id l26sm721262lfj.22.2020.07.29.14.50.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jul 2020 14:50:22 -0700 (PDT) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: Linus Walleij , =?utf-8?q?Uwe_Kleine-K=C3=B6?= =?utf-8?q?nig?= , Anatolij Gustschin , linuxppc-dev@lists.ozlabs.org Subject: [PATCH 1/2] spi: mpc512x-psc: Use the framework .set_cs() Date: Wed, 29 Jul 2020 23:48:16 +0200 Message-Id: <20200729214817.478834-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The mpc512x-psc is rolling its own chip select control code, but the SPI master framework can handle this. It was also evaluating the CS status for each transfer but the CS change should be per-message not per-transfer. Switch to use the core .set_cs() to control the chip select. Cc: Uwe Kleine-König Cc: Anatolij Gustschin Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Linus Walleij --- drivers/spi/spi-mpc512x-psc.c | 30 ++++++++---------------------- 1 file changed, 8 insertions(+), 22 deletions(-) -- 2.26.2 diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c index ea1b07953d38..35313a77f977 100644 --- a/drivers/spi/spi-mpc512x-psc.c +++ b/drivers/spi/spi-mpc512x-psc.c @@ -89,7 +89,7 @@ static int mpc512x_psc_spi_transfer_setup(struct spi_device *spi, return 0; } -static void mpc512x_psc_spi_activate_cs(struct spi_device *spi) +static void mpc512x_psc_spi_set_cs(struct spi_device *spi, bool enable) { struct mpc512x_psc_spi_cs *cs = spi->controller_state; struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master); @@ -98,6 +98,12 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device *spi) int speed; u16 bclkdiv; + if (!enable) { + if (mps->cs_control && gpio_is_valid(spi->cs_gpio)) + mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 0 : 1); + return; + } + sicr = in_be32(psc_addr(mps, sicr)); /* Set clock phase and polarity */ @@ -132,15 +138,6 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device *spi) mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 1 : 0); } -static void mpc512x_psc_spi_deactivate_cs(struct spi_device *spi) -{ - struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master); - - if (mps->cs_control && gpio_is_valid(spi->cs_gpio)) - mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 0 : 1); - -} - /* extract and scale size field in txsz or rxsz */ #define MPC512x_PSC_FIFO_SZ(sz) ((sz & 0x7ff) << 2); @@ -290,40 +287,28 @@ static int mpc512x_psc_spi_msg_xfer(struct spi_master *master, struct spi_message *m) { struct spi_device *spi; - unsigned cs_change; int status; struct spi_transfer *t; spi = m->spi; - cs_change = 1; status = 0; list_for_each_entry(t, &m->transfers, transfer_list) { status = mpc512x_psc_spi_transfer_setup(spi, t); if (status < 0) break; - if (cs_change) - mpc512x_psc_spi_activate_cs(spi); - cs_change = t->cs_change; - status = mpc512x_psc_spi_transfer_rxtx(spi, t); if (status) break; m->actual_length += t->len; spi_transfer_delay_exec(t); - - if (cs_change) - mpc512x_psc_spi_deactivate_cs(spi); } m->status = status; if (m->complete) m->complete(m->context); - if (status || !cs_change) - mpc512x_psc_spi_deactivate_cs(spi); - mpc512x_psc_spi_transfer_setup(spi, NULL); spi_finalize_current_message(master); @@ -513,6 +498,7 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr, master->prepare_transfer_hardware = mpc512x_psc_spi_prep_xfer_hw; master->transfer_one_message = mpc512x_psc_spi_msg_xfer; master->unprepare_transfer_hardware = mpc512x_psc_spi_unprep_xfer_hw; + master->set_cs = mpc512x_psc_spi_set_cs; master->cleanup = mpc512x_psc_spi_cleanup; master->dev.of_node = dev->of_node;