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[v3,7/7] dt-bindings: spi: dw-apb-ssi: Add Intel Keem Bay support

Message ID 20200504121151.1085-8-wan.ahmad.zainie.wan.mohamad@intel.com
State New
Headers show
Series [v3,1/7] spi: dw: Fix typo in few registers name | expand

Commit Message

Wan Ahmad Zainie May 4, 2020, 12:11 p.m. UTC
Document Intel Keem Bay SPI controller DT bindings.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
---
 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index f67852fb9d94..edc1e6fb9993 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -20,6 +20,7 @@  properties:
       - amazon,alpine-dw-apb-ssi
       - snps,dw-apb-ssi
       - snps,dwc-ssi-1.01a
+      - intel,keembay-ssi
 
   reg:
     minItems: 1