From patchwork Sat Apr 20 11:14:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 162593 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp468462jan; Sat, 20 Apr 2019 04:17:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqxFjhwLuWZfIhW6QxIv7vAPFFpd2fNntZB4thKMNXTtNhUIShLKZ7QwSBWGl/e4bq/DZ418 X-Received: by 2002:aa7:82d6:: with SMTP id f22mr895096pfn.190.1555759051047; Sat, 20 Apr 2019 04:17:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555759051; cv=none; d=google.com; s=arc-20160816; b=xXG2F2I0qTwb6VTiJtF1qPsTvoYuqwlfVv6ubSoB8IRNnSPxyA84xDj0xtbJXMzofV Q13TzKh4gQrDYxaeysGY4PvpMDzECoj4HeL1bsUvwNe7mtGOoh5bI3mf20q2m7fhudzX qzBtzSLd4MrLn48j8NtZaIhinsZAGYPWgH9VWMMlG9JbgHdSJExsTiVS249ujDXnEzSh wnCosonsqRLbyRGnffB81XSiM3P4cYsGM3bZXrdSe5o1fuYRQmTta+rbJtwDbu/F57fl xvZUrtK/j68lGm8PTdNUlyV1zpyLYO/A0/lyBit3bZIG7U1AL7PN1b64ZQYr4CyissrN OycA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=QJ8FDNgp1VUuT/wpZpm3LILQ20WThDEV9onYHEgsf2s=; b=tEAdbIXVOnNNOfXBhV8wrEKYzOgy8+rlyRML4ftki5iGBkcX1B1jDPoOoDUCS6kNgI OFiY04Iu87XzXy7CquB/qh04SwuJBGSBSpQZf/zfpyDFNqtCCf7SUYdxMKRq4gp6nRNE 967mUo9wkBdUuLVm5w0QfhVscuJKmPYt5ug/8w2qto6ZI/lmEtZBJf8MU165fGGOg+VB KXukB4NvJpS94vUJkKjF3U/yZhWCFWRop7HXK03YRPk1Ayrm4ddP2Z41kfYKinjak+bL 0/4HIM2LLONgN3oo/D/rSGq0aKqPcdtXrHIj6G98g4MD3E2eSHfZpxuPMq1sqyL9MZLd u48Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ynx9pE6q; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o3si7796841pld.61.2019.04.20.04.17.30; Sat, 20 Apr 2019 04:17:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ynx9pE6q; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726267AbfDTLRa (ORCPT + 1 other); Sat, 20 Apr 2019 07:17:30 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:38840 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725920AbfDTLRa (ORCPT ); Sat, 20 Apr 2019 07:17:30 -0400 Received: by mail-lf1-f66.google.com with SMTP id v1so5719512lfg.5 for ; Sat, 20 Apr 2019 04:17:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QJ8FDNgp1VUuT/wpZpm3LILQ20WThDEV9onYHEgsf2s=; b=Ynx9pE6qrPNOgf/VJ9H3a+kyf6nb1QJsyY1G1DaUGif6hOMPkLmBuoXwYrRGR4yIsw kKPqymMkJT1fKViyZMeOF4zuUPimMxlL8vZa4nRzipcmoKd7QFzh9pqDifHdK5RVsENl qItIHFgCfpzEg9xqv0elEGwS1NNeQJ8ssyNYWRTVsiEDHVcjziHi1XkS6OneZ9DawJ59 6+7Da7rrXgQ2qzBEAcWIYZ6XdZqSnsnbU7QKZsga5H200LCWpMTRqJhhb6f8BeD4Kv/4 Bsve9EqKsAXtjAPwYZ9Ko5kwjlzqhr6RPyix2S7fin348GTeHwHG4m2O2iDzWZgMEW6v w/uQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QJ8FDNgp1VUuT/wpZpm3LILQ20WThDEV9onYHEgsf2s=; b=RyzcBI5ByVvCfIIWTL9gup160XaxQgdYWiqa3F9tI2ICBsxyJPZVMVSFgc5Qr8szS1 TQEjwTjQpdkGCW6ZDG2ydo3BVHTG4ptWkpenk69ol87Z7zRqPFC9sCSxx7vh9a87td+A 9nQxz37CAbrD/742NH0thmZClj94eEF2/kLroe4v+ZTNwF/gxhH6VKkQ2Fz1PDvMn/kK lMc8XI+gID9PLvOmjXlLrjEIwp6YXYBd0+13aPflUdXfFsFJYVt4FIdGxeWkOa6eIEMM KDDRDCTDGc9X51miCIJkFip7tebmqeDqRBW9EZ5gMLSmRZR6szB02Q+PRyAEcWnYQx3h SVmQ== X-Gm-Message-State: APjAAAUx8X2iXDaeUYHNBm+jxdJIvArF9H0adZQsXpQkyv28sFFdqxXu HxENcXt5f9I1XfjosBsi4hC9SA== X-Received: by 2002:ac2:51a1:: with SMTP id f1mr4511488lfk.129.1555759047332; Sat, 20 Apr 2019 04:17:27 -0700 (PDT) Received: from localhost.localdomain (c-c5d3225c.014-348-6c756e10.bbcust.telenor.se. [92.34.211.197]) by smtp.gmail.com with ESMTPSA id u2sm1649376lje.74.2019.04.20.04.17.26 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 20 Apr 2019 04:17:26 -0700 (PDT) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org, Fabio Estevam Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Subject: [PATCH 2/2] spi: fsl: Convert to use CS GPIO descriptors Date: Sat, 20 Apr 2019 13:14:04 +0200 Message-Id: <20190420111404.6225-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190420111404.6225-1-linus.walleij@linaro.org> References: <20190420111404.6225-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This converts the Freescale SPI master driver to use GPIO descriptors for chip select handling. The Freescale (fsl) driver has a lot of quirks to look up "gpios" rather than "cs-gpios" from the device tree. After the prior patch that will make gpiolib return the GPIO descriptor for "gpios" in response to a request for "cs-gpios", this code can be cut down quite a bit. The driver has custom handling of chip select rather than using the core (which may be possible but not done in this patch) so it still needs to refer directly to spi->cs_gpiod to set the chip select. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Rebased on v5.1-rc1 --- drivers/spi/spi-fsl-lib.h | 2 - drivers/spi/spi-fsl-spi.c | 158 +++----------------------------------- 2 files changed, 9 insertions(+), 151 deletions(-) -- 2.20.1 diff --git a/drivers/spi/spi-fsl-lib.h b/drivers/spi/spi-fsl-lib.h index f303f306b38e..22d59b555c71 100644 --- a/drivers/spi/spi-fsl-lib.h +++ b/drivers/spi/spi-fsl-lib.h @@ -95,8 +95,6 @@ static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg) struct mpc8xxx_spi_probe_info { struct fsl_spi_platform_data pdata; - int *gpios; - bool *alow_flags; }; extern u32 mpc8xxx_spi_tx_buf_u8(struct mpc8xxx_spi *mpc8xxx_spi); diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c index 8f2e97857e8b..79078245ebeb 100644 --- a/drivers/spi/spi-fsl-spi.c +++ b/drivers/spi/spi-fsl-spi.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include #include @@ -32,7 +32,6 @@ #include #include #include -#include #include #include #include @@ -460,32 +459,6 @@ static int fsl_spi_setup(struct spi_device *spi) return retval; } - if (mpc8xxx_spi->type == TYPE_GRLIB) { - if (gpio_is_valid(spi->cs_gpio)) { - int desel; - - retval = gpio_request(spi->cs_gpio, - dev_name(&spi->dev)); - if (retval) - return retval; - - desel = !(spi->mode & SPI_CS_HIGH); - retval = gpio_direction_output(spi->cs_gpio, desel); - if (retval) { - gpio_free(spi->cs_gpio); - return retval; - } - } else if (spi->cs_gpio != -ENOENT) { - if (spi->cs_gpio < 0) - return spi->cs_gpio; - return -EINVAL; - } - /* When spi->cs_gpio == -ENOENT, a hole in the phandle list - * indicates to use native chipselect if present, or allow for - * an always selected chip - */ - } - /* Initialize chipselect - might be active for SPI_CS_HIGH mode */ fsl_spi_chipselect(spi, BITBANG_CS_INACTIVE); @@ -497,9 +470,6 @@ static void fsl_spi_cleanup(struct spi_device *spi) struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi); - if (mpc8xxx_spi->type == TYPE_GRLIB && gpio_is_valid(spi->cs_gpio)) - gpio_free(spi->cs_gpio); - kfree(cs); spi_set_ctldata(spi, NULL); } @@ -565,8 +535,8 @@ static void fsl_spi_grlib_cs_control(struct spi_device *spi, bool on) u32 slvsel; u16 cs = spi->chip_select; - if (gpio_is_valid(spi->cs_gpio)) { - gpio_set_value(spi->cs_gpio, on); + if (spi->cs_gpiod) { + gpiod_set_value(spi->cs_gpiod, on); } else if (cs < mpc8xxx_spi->native_chipselects) { slvsel = mpc8xxx_spi_read_reg(®_base->slvsel); slvsel = on ? (slvsel | (1 << cs)) : (slvsel & ~(1 << cs)); @@ -695,117 +665,11 @@ static struct spi_master * fsl_spi_probe(struct device *dev, return ERR_PTR(ret); } -static void fsl_spi_cs_control(struct spi_device *spi, bool on) -{ - struct device *dev = spi->dev.parent->parent; - struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); - struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata); - u16 cs = spi->chip_select; - int gpio = pinfo->gpios[cs]; - bool alow = pinfo->alow_flags[cs]; - - gpio_set_value(gpio, on ^ alow); -} - -static int of_fsl_spi_get_chipselects(struct device *dev) -{ - struct device_node *np = dev->of_node; - struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); - struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata); - int ngpios; - int i = 0; - int ret; - - ngpios = of_gpio_count(np); - if (ngpios <= 0) { - /* - * SPI w/o chip-select line. One SPI device is still permitted - * though. - */ - pdata->max_chipselect = 1; - return 0; - } - - pinfo->gpios = kmalloc_array(ngpios, sizeof(*pinfo->gpios), - GFP_KERNEL); - if (!pinfo->gpios) - return -ENOMEM; - memset(pinfo->gpios, -1, ngpios * sizeof(*pinfo->gpios)); - - pinfo->alow_flags = kcalloc(ngpios, sizeof(*pinfo->alow_flags), - GFP_KERNEL); - if (!pinfo->alow_flags) { - ret = -ENOMEM; - goto err_alloc_flags; - } - - for (; i < ngpios; i++) { - int gpio; - enum of_gpio_flags flags; - - gpio = of_get_gpio_flags(np, i, &flags); - if (!gpio_is_valid(gpio)) { - dev_err(dev, "invalid gpio #%d: %d\n", i, gpio); - ret = gpio; - goto err_loop; - } - - ret = gpio_request(gpio, dev_name(dev)); - if (ret) { - dev_err(dev, "can't request gpio #%d: %d\n", i, ret); - goto err_loop; - } - - pinfo->gpios[i] = gpio; - pinfo->alow_flags[i] = flags & OF_GPIO_ACTIVE_LOW; - - ret = gpio_direction_output(pinfo->gpios[i], - pinfo->alow_flags[i]); - if (ret) { - dev_err(dev, - "can't set output direction for gpio #%d: %d\n", - i, ret); - goto err_loop; - } - } - - pdata->max_chipselect = ngpios; - pdata->cs_control = fsl_spi_cs_control; - - return 0; - -err_loop: - while (i >= 0) { - if (gpio_is_valid(pinfo->gpios[i])) - gpio_free(pinfo->gpios[i]); - i--; - } - kfree(pinfo->alow_flags); - pinfo->alow_flags = NULL; -err_alloc_flags: - kfree(pinfo->gpios); - pinfo->gpios = NULL; - return ret; -} - -static int of_fsl_spi_free_chipselects(struct device *dev) +static void fsl_spi_cs_control(struct spi_device *spi, bool on) { - struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); - struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata); - int i; - - if (!pinfo->gpios) - return 0; - - for (i = 0; i < pdata->max_chipselect; i++) { - if (gpio_is_valid(pinfo->gpios[i])) - gpio_free(pinfo->gpios[i]); - } - - kfree(pinfo->gpios); - kfree(pinfo->alow_flags); - return 0; + if (spi->cs_gpiod) + gpiod_set_value(spi->cs_gpiod, on); } static int of_fsl_spi_probe(struct platform_device *ofdev) @@ -823,9 +687,9 @@ static int of_fsl_spi_probe(struct platform_device *ofdev) type = fsl_spi_get_type(&ofdev->dev); if (type == TYPE_FSL) { - ret = of_fsl_spi_get_chipselects(dev); - if (ret) - goto err; + struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); + + pdata->cs_control = fsl_spi_cs_control; } ret = of_address_to_resource(np, 0, &mem); @@ -848,8 +712,6 @@ static int of_fsl_spi_probe(struct platform_device *ofdev) err: irq_dispose_mapping(irq); - if (type == TYPE_FSL) - of_fsl_spi_free_chipselects(dev); return ret; } @@ -859,8 +721,6 @@ static int of_fsl_spi_remove(struct platform_device *ofdev) struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); fsl_spi_cpm_free(mpc8xxx_spi); - if (mpc8xxx_spi->type == TYPE_FSL) - of_fsl_spi_free_chipselects(&ofdev->dev); return 0; }