From patchwork Tue Jul 5 09:11:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 587675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A679CCA47B for ; Tue, 5 Jul 2022 09:27:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231308AbiGEJ1F (ORCPT ); Tue, 5 Jul 2022 05:27:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230381AbiGEJ06 (ORCPT ); Tue, 5 Jul 2022 05:26:58 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2B0DDF2F; Tue, 5 Jul 2022 02:26:55 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8DBA51A08BC; Tue, 5 Jul 2022 11:26:54 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 54F8C1A0AE4; Tue, 5 Jul 2022 11:26:54 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id E7BB11802204; Tue, 5 Jul 2022 17:26:51 +0800 (+08) From: haibo.chen@nxp.com To: ashish.kumar@nxp.com, yogeshgaur.83@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, han.xu@nxp.com, singh.kuldeep87k@gmail.com, tudor.ambarus@microchip.com, p.yadav@ti.com, michael@walle.cc, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, festevam@gmail.com, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, haibo.chen@nxp.com, zhengxunli@mxic.com.tw Subject: [PATCH 05/11] spi: spi-nxp-fspi: Add quirk to disable DTR support Date: Tue, 5 Jul 2022 17:11:37 +0800 Message-Id: <1657012303-6464-5-git-send-email-haibo.chen@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1657012303-6464-1-git-send-email-haibo.chen@nxp.com> References: <1657012303-6464-1-git-send-email-haibo.chen@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Haibo Chen Not all platform currently supports octal DTR mode. lx2160a do not implement DQS, this causes flash probe failure and therefore, provide an option of quirk FSPI_QUIRK_DISABLE_DTR for platforms not support DTR mode. Signed-off-by: Haibo Chen --- drivers/spi/spi-nxp-fspi.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c index 34679dc0e1ad..61cf1b82c0d7 100644 --- a/drivers/spi/spi-nxp-fspi.c +++ b/drivers/spi/spi-nxp-fspi.c @@ -325,6 +325,9 @@ /* Access flash memory using IP bus only */ #define FSPI_QUIRK_USE_IP_ONLY BIT(0) +/* Disable DTR */ +#define FSPI_QUIRK_DISABLE_DTR BIT(1) + struct nxp_fspi_devtype_data { unsigned int rxfifo; unsigned int txfifo; @@ -337,7 +340,7 @@ static struct nxp_fspi_devtype_data lx2160a_data = { .rxfifo = SZ_512, /* (64 * 64 bits) */ .txfifo = SZ_1K, /* (128 * 64 bits) */ .ahb_buf_size = SZ_2K, /* (256 * 64 bits) */ - .quirks = 0, + .quirks = FSPI_QUIRK_DISABLE_DTR, .little_endian = true, /* little-endian */ }; @@ -1149,10 +1152,14 @@ static const struct spi_controller_mem_ops nxp_fspi_mem_ops = { .get_name = nxp_fspi_get_name, }; -static struct spi_controller_mem_caps nxp_fspi_mem_caps = { +static const struct spi_controller_mem_caps nxp_fspi_mem_caps = { .dtr = true, }; +static const struct spi_controller_mem_caps nxp_fspi_mem_caps_quirks = { + .dtr = false, +}; + static int nxp_fspi_probe(struct platform_device *pdev) { struct spi_controller *ctlr; @@ -1257,7 +1264,10 @@ static int nxp_fspi_probe(struct platform_device *pdev) ctlr->bus_num = -1; ctlr->num_chipselect = NXP_FSPI_MAX_CHIPSELECT; ctlr->mem_ops = &nxp_fspi_mem_ops; - ctlr->mem_caps = &nxp_fspi_mem_caps; + if (f->devtype_data->quirks & FSPI_QUIRK_DISABLE_DTR) + ctlr->mem_caps = &nxp_fspi_mem_caps_quirks; + else + ctlr->mem_caps = &nxp_fspi_mem_caps; nxp_fspi_default_setup(f);