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Fri, 4 Feb 2022 02:30:03 -0800 From: Krishna Yarlagadda To: , , , , CC: , , , , , , Krishna Yarlagadda Subject: [PATCH 3/6] spi: tegra210-quad: add new chips to compatible Date: Fri, 4 Feb 2022 15:59:33 +0530 Message-ID: <1643970576-31503-4-git-send-email-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1643970576-31503-1-git-send-email-kyarlagadda@nvidia.com> References: <1643970576-31503-1-git-send-email-kyarlagadda@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: bbc69843-614c-49c8-2ee9-08d9e7c952d5 X-MS-TrafficTypeDiagnostic: MN2PR12MB3743:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2089; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Yg6wrAuvzj62svD3iUDSlfy8xzljxw6odmcux2oAFJvnEeDupfAxIZtOyx9fOKrIm6TKFSU4OaH/9gXwQQ3f0xWrMtbKdk+lw/a6JBYhnVZwvXnEW+RW6CBq91GfIr7c952lijrsen/onNsVn/WjKiDmBmc/C3zRSBG6TZRD1mw9Lyx+WcF/He05D2VfO+wOMmuRNLJaBLaZqoKacQxRbCkheHxcpVpHllfvebRPuj8Tjqf2eMupdK2RJeVC7W92nLMqzDdrZCksHUgfaSBC2ABFlcDyhuTve5yWzJHHgBhu999y3U6hisqOyIWj96MgTc8hF2z4w09j8Sf7GbRPM3SXN4M2z0A+qDok3GH3oN+ier64CVNgQtp2SY3ODj4yksb2Ydw4WHmQOLhvxmQRLRWWxQXOz/MtwD4dn+HvKp67S3kI2sVJ/r4mfp2/PVXyz8yvw78qeCMtsQkA/dhKjUgEfJdljXPu/5dpmOOPVkXOn+vMINlCiEhMyi7lp1oolY8JdXFVWNWS3R2JBVM8nLNM1fRYPHUSyPG7JNAQCt7JTdrhN6O4Hsmp+rMWeCuVyVsSukGqDQm+WqR0+QRJ3qsZB5fxB+23xwMBQwcEgN+c8EdSloQfKUZG/NNMVNDxtS76g1gmhNMet4B/0S0rmCbgh23MU1mrZCnKwZFurACv7TrctOfk1ZH6Cay/7yrlYrRZiHkKxwhrpRvF3cfaOA== X-Forefront-Antispam-Report: CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230001)(4636009)(46966006)(36840700001)(40470700004)(110136005)(8676002)(8936002)(40460700003)(54906003)(4326008)(47076005)(70206006)(70586007)(82310400004)(316002)(36860700001)(2906002)(508600001)(86362001)(356005)(6666004)(81166007)(7696005)(83380400001)(5660300002)(186003)(336012)(426003)(26005)(2616005)(107886003)(36756003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2022 10:30:11.1906 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbc69843-614c-49c8-2ee9-08d9e7c952d5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3743 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add support for Tegra234 and soc data to select capabilities. Signed-off-by: Krishna Yarlagadda --- drivers/spi/spi-tegra210-quad.c | 33 ++++++++++++++++++++++++++++++--- 1 file changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index ef93e40..2e5f20c 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -125,6 +125,10 @@ #define QSPI_DMA_TIMEOUT (msecs_to_jiffies(1000)) #define DEFAULT_QSPI_DMA_BUF_LEN (64 * 1024) +struct tegra_qspi_soc_data { + bool has_dma; +}; + struct tegra_qspi_client_data { int tx_clk_tap_delay; int rx_clk_tap_delay; @@ -184,6 +188,7 @@ struct tegra_qspi { u32 *tx_dma_buf; dma_addr_t tx_dma_phys; struct dma_async_tx_descriptor *tx_dma_desc; + const struct tegra_qspi_soc_data *soc_data; }; static inline u32 tegra_qspi_readl(struct tegra_qspi *tqspi, unsigned long offset) @@ -1190,10 +1195,32 @@ static irqreturn_t tegra_qspi_isr_thread(int irq, void *context_data) return handle_dma_based_xfer(tqspi); } +static struct tegra_qspi_soc_data tegra210_qspi_soc_data = { + .has_dma = true, +}; + +static struct tegra_qspi_soc_data tegra186_qspi_soc_data = { + .has_dma = true, +}; + +static struct tegra_qspi_soc_data tegra234_qspi_soc_data = { + .has_dma = false, +}; + static const struct of_device_id tegra_qspi_of_match[] = { - { .compatible = "nvidia,tegra210-qspi", }, - { .compatible = "nvidia,tegra186-qspi", }, - { .compatible = "nvidia,tegra194-qspi", }, + { + .compatible = "nvidia,tegra210-qspi", + .data = &tegra210_qspi_soc_data, + }, { + .compatible = "nvidia,tegra186-qspi", + .data = &tegra186_qspi_soc_data, + }, { + .compatible = "nvidia,tegra194-qspi", + .data = &tegra186_qspi_soc_data, + }, { + .compatible = "nvidia,tegra234-qspi", + .data = &tegra234_qspi_soc_data, + }, {} };