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Fri, 4 Feb 2022 02:29:55 -0800 From: Krishna Yarlagadda To: , , , , CC: , , , , , , Krishna Yarlagadda Subject: [PATCH 1/6] spi: tegra210-quad: use device_reset method Date: Fri, 4 Feb 2022 15:59:31 +0530 Message-ID: <1643970576-31503-2-git-send-email-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1643970576-31503-1-git-send-email-kyarlagadda@nvidia.com> References: <1643970576-31503-1-git-send-email-kyarlagadda@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 07a09475-0867-44f9-880d-08d9e7c94d24 X-MS-TrafficTypeDiagnostic: BN6PR12MB1378:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1107; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: o1e2U3ZBnLVGj9z+E+FNB8Qm8jCDOd3U+7ieLSaZpjCzedODPsLI6nAtJdcHKT9v49v5VwPIjUq0xw/MpRBPLa7vlleY1MpnL9pq6B1mpHU5eI1U2HQTG2IyEDRuUl/pbSkoZwk3h10VBUjUAnKDq6bEKjOgpVzijFSkQi0z6dIVtD9P6Acd2A5BTgbkXuhkZ7IkbLIU4xgCSaYfcVwnosMFPZI66ZtF1wXmtuOoQy46xc9F4L2cudYiFtD9iuw1kp2SU90j8hDt/xD6nQ+h1kqUpqX0UmLEtR6Q1fvlilJIOcBdCUbcN15lBf42I5roVq4H7TNQMnB4OvTpc7EF6qa3CRdJvl8Rio9zdzAzQwM4M/cc0zj8llN6oJTDaS3BvrVuAI4MSVfg2llxqTk4eUGCVMGAMc71bCAuuq06DNyV/HhGygdasohpKHyODSwfCt+FzqHSbdeLazMIP+CiIB9cKTZYc7ISzb74NiclbKjqAQLtztjg1QTTg7Swn131+eHrSZH/O07ukdke+T/SfrYvJYgxr9xX6DV6SOIpgMgvUCvqaa4KIkTg+lvb0l7hY8M4sz9kThun425rbWgUQbXVCeYKLOJkX1/JPXyqrNTYNcZM359VMxaWhTnhD86WiUNY+HMZYFbNgeddrwKTLeZh0r3dUJnjhLNwO+IKIi8AUh2ImfBSaP0bP6GB0LMm6y2CsrQYeG83Z63b3TLRHw== X-Forefront-Antispam-Report: CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230001)(4636009)(36840700001)(46966006)(40470700004)(86362001)(82310400004)(40460700003)(356005)(70206006)(8936002)(8676002)(4326008)(70586007)(316002)(110136005)(54906003)(81166007)(5660300002)(7696005)(107886003)(36860700001)(83380400001)(47076005)(508600001)(2616005)(6666004)(336012)(186003)(26005)(426003)(36756003)(2906002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2022 10:30:01.6599 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 07a09475-0867-44f9-880d-08d9e7c94d24 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1378 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Use device_reset api to replace duplicate code in driver to call reset_control_get api with reset handle. Signed-off-by: Krishna Yarlagadda --- drivers/spi/spi-tegra210-quad.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index ce1bdb4..ef93e40 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -137,7 +137,6 @@ struct tegra_qspi { spinlock_t lock; struct clk *clk; - struct reset_control *rst; void __iomem *base; phys_addr_t phys; unsigned int irq; @@ -948,9 +947,7 @@ static void tegra_qspi_handle_error(struct tegra_qspi *tqspi) dev_err(tqspi->dev, "error in transfer, fifo status 0x%08x\n", tqspi->status_reg); tegra_qspi_dump_regs(tqspi); tegra_qspi_flush_fifos(tqspi, true); - reset_control_assert(tqspi->rst); - udelay(2); - reset_control_deassert(tqspi->rst); + device_reset(tqspi->dev); } static void tegra_qspi_transfer_end(struct spi_device *spi) @@ -1249,13 +1246,6 @@ static int tegra_qspi_probe(struct platform_device *pdev) return ret; } - tqspi->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL); - if (IS_ERR(tqspi->rst)) { - ret = PTR_ERR(tqspi->rst); - dev_err(&pdev->dev, "failed to get reset control: %d\n", ret); - return ret; - } - tqspi->max_buf_size = QSPI_FIFO_DEPTH << 2; tqspi->dma_buf_size = DEFAULT_QSPI_DMA_BUF_LEN; @@ -1277,9 +1267,7 @@ static int tegra_qspi_probe(struct platform_device *pdev) goto exit_pm_disable; } - reset_control_assert(tqspi->rst); - udelay(2); - reset_control_deassert(tqspi->rst); + device_reset(tqspi->dev); tqspi->def_command1_reg = QSPI_M_S | QSPI_CS_SW_HW | QSPI_CS_SW_VAL; tegra_qspi_writel(tqspi, tqspi->def_command1_reg, QSPI_COMMAND1);