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Thu, 25 Nov 2021 01:56:08 -0800 From: Krishna Yarlagadda To: Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , "Laxman Dewangan" , Mark Brown CC: Krishna Yarlagadda , , , Subject: [PATCH 1/2] spi: tegra210-quad: use devm call for cdata memory Date: Thu, 25 Nov 2021 15:25:51 +0530 Message-ID: <1637834152-32093-1-git-send-email-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: fec9a35f-2eff-424c-9ce6-08d9aff9d13c X-MS-TrafficTypeDiagnostic: MWHPR1201MB0109: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1417; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: S+cjT102aFeHIHvdFB1WJbAZ2527RmKQ+4OV9/dUpxahIgOkDmCPWyo6pU0l8soWLo5NE+qzH/w0IXF4CHAo9K+NXpQyQriqwmSJ/VXnAkGjLsyuRfL/vX1FXe1aSu5S9umemwb9xw0vQ+MLxzJwbtRqRNLBBXurytC8/zbhoIqAJVbmqzp1EyE880tGFvVF72HBRg/Y7WVfymn0adejngEuvL3hE2A+qTygtukfXuqcBqeHZLWbR2cIHAgVbQZ7ePLR35O2u87jKcn9qgYhpPEhHQ71TeuXvXnA4qNr5Z4v/v1UVGokALWGLPLGBC+P6ph7e+wYBIcCBRT7oCrvb8WazVjSP6X52P6Hym3wIETowlGQfsvAL9n931+W0WKZBLQp01tFsEPbsUD09U9AltFF9GzUt6pN3NnjCt2JjIVzO5Syg3qwcxaB0Rz2grXtymszTy2H7hiejPZzydGeQ6HIFicI/GdbZA3ZHNNnyvYPS7hOTwfS0+2dY1wI+zI0TJN1A7o5jp60bLgCeruA8RQYacEHN9GnkiCKLDo/G5jcVrT1JZ6H9nLtuZORLbnlsVinhcUPtQWTpcPI9lHTBUm516dg7d0MDT5jHo3GJozI0LdxZ9hw2K6olzmi/OLui9pbkcZO+qgZFgi39/627Byw2N4SEBVUO81NRLwj+paR8WJ73uePJ2DOpUS0cRwJ2dHauTaXnR3IxFiWd03UUw== X-Forefront-Antispam-Report: CIP:216.228.112.35; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid04.nvidia.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(36756003)(2906002)(110136005)(54906003)(7696005)(36860700001)(26005)(47076005)(426003)(4326008)(336012)(186003)(82310400004)(86362001)(6666004)(70586007)(356005)(70206006)(83380400001)(7636003)(2616005)(5660300002)(8676002)(316002)(8936002)(508600001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Nov 2021 09:56:13.9864 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fec9a35f-2eff-424c-9ce6-08d9aff9d13c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.35]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT015.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR1201MB0109 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Use devm alloc call to allocate memory for spi controller data and remove free calls from cleanup. Signed-off-by: Krishna Yarlagadda --- drivers/spi/spi-tegra210-quad.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index c0f9a75..ce1bdb4 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -877,7 +877,7 @@ static struct tegra_qspi_client_data *tegra_qspi_parse_cdata_dt(struct spi_devic struct tegra_qspi_client_data *cdata; struct device_node *slave_np = spi->dev.of_node; - cdata = kzalloc(sizeof(*cdata), GFP_KERNEL); + cdata = devm_kzalloc(&spi->dev, sizeof(*cdata), GFP_KERNEL); if (!cdata) return NULL; @@ -888,14 +888,6 @@ static struct tegra_qspi_client_data *tegra_qspi_parse_cdata_dt(struct spi_devic return cdata; } -static void tegra_qspi_cleanup(struct spi_device *spi) -{ - struct tegra_qspi_client_data *cdata = spi->controller_data; - - spi->controller_data = NULL; - kfree(cdata); -} - static int tegra_qspi_setup(struct spi_device *spi) { struct tegra_qspi *tqspi = spi_master_get_devdata(spi->master); @@ -1229,7 +1221,6 @@ static int tegra_qspi_probe(struct platform_device *pdev) SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD; master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8); master->setup = tegra_qspi_setup; - master->cleanup = tegra_qspi_cleanup; master->transfer_one_message = tegra_qspi_transfer_one_message; master->num_chipselect = 1; master->auto_runtime_pm = true;