diff mbox series

[PATCHv1,1/3] dt-bindings: spi: Add DT bindings for Synquacer

Message ID 1515503432-8971-1-git-send-email-jassisinghbrar@gmail.com
State New
Headers show
Series spi: support for Socionext Synquacer platform | expand

Commit Message

Jassi Brar Jan. 9, 2018, 1:10 p.m. UTC 
From: Jassi Brar <jaswinder.singh@linaro.org>


This patch adds documentation for Device-Tree bindings for the
Socionext Synquacer spi driver.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>

---
 .../devicetree/bindings/spi/spi-synquacer.txt      | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-synquacer.txt

-- 
2.7.4

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Comments

Mark Brown Jan. 9, 2018, 4:44 p.m. UTC | #1 
On Tue, Jan 09, 2018 at 06:40:32PM +0530, jassisinghbrar@gmail.com wrote:

> +- socionext,use-rtm: boolean, if required to use "retimed clock" for RX

> +- socionext,set-aces: boolean, if same active clock edges field to be set.


What are these and why are they configurable?  The active clock edges
thing in particular sounds a little like it might be related to the SPI
modes?
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/spi/spi-synquacer.txt b/Documentation/devicetree/bindings/spi/spi-synquacer.txt
new file mode 100644
index 0000000..d013cfd
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-synquacer.txt
@@ -0,0 +1,24 @@ 
+* Socionext Synquacer HS-SPI bindings
+
+Required Properties:
+- compatible: should be "socionext,synquacer-spi"
+- reg: physical base address of the controller and length of memory mapped
+       region.
+- clocks: Must contain an entry for rate source clock(s).
+- clock-names: Shall be "iHCLK" or "iPCLK". iHCLK is preferred over iPCLK
+
+Optional Properties:
+- num-cs: total number of chipselects
+- socionext,use-rtm: boolean, if required to use "retimed clock" for RX
+- socionext,set-aces: boolean, if same active clock edges field to be set.
+
+Example:
+
+	spi0: spi@ff110000 {
+		compatible = "socionext,synquacer-spi";
+		reg = <0xff110000 0x1000>;
+		clocks = <&clk_fip006_spi>;
+		clock-names = "iHCLK";
+		socionext,use-rtm;
+		socionext,set-aces;
+	};