[v8,0/2] spi: loongson: add bus driver for the loongson spi

Loongson platform support spi hardware controller and this series patch
was to add spi driver and binding support.

Change in v2:
		1. This [PATCH v2 1/2] dt-bindings patch need depend on clk patch:
	 	   https://
		   lore.kernel.org/all/20230307115022.12846-1-zhuyinbo@loongson.cn/
		2. Remove the clock-names in spi yaml file.
		3. Add "loongson,ls7a-spi" compatible in spi yaml file.
		4. Add an || COMPILE_TEST and drop && PCI then add some CONFIG_PCI
		   macro to limit some pci code.
		5. Make the spi driver top code comment block that use C++ style.
		6. Drop spi->max_speed_hz.
		7. Add a spin_lock for loongson_spi_setup.
		8. Add a timeout and cpu_relax() in loongson_spi_write_read_8bit.
		9. Add spi_transfer_one and drop transfer and rework entire spi
		   driver that include some necessary changes.
		10. Use module_init replace subsys_initcall.
		11. About PM interface that I don't find any issue so I don't add
		    any changes.
Change in v3:
		1. This [PATCH v3 1/2] dt-bindings patch need depend on clk patch:
		   https://
		   lore.kernel.org/all/20230323025229.2971-1-zhuyinbo@loongson.cn/
		2. Drop the unused blank line in loongson,ls-spi.yaml file.
		3. Replace clock minItems with clock maxItems in yaml file.
		4. Separate spi driver into platform module, pci module and core
		   module.
		5. Replace DIV_ROUND_UP with DIV_ROUND_UP_ULL to fix compile error
		   "undefined reference to `__aeabi_uldivmod'" and  "__udivdi3 undefined"
		   that reported by test robot.
		6. Remove the spin lock.
		7. Clear the loongson_spi->hz and loongson_spi->mode in setup to fixup
		   the issue that multiple spi device transfer that maybe cause spi was
		   be misconfigured.
Change in v4:
		1. This [PATCH v4 1/2] dt-bindings patch need depend on clk patch:
		   https://
		   lore.kernel.org/all/20230323025229.2971-1-zhuyinbo@loongson.cn/
		2. Add "#include <linux/io.h>" in spi-loongson-core.c for fix the compile
		   issue which devm_ioremap no declaration.
		3. Add "EXPORT_SYMBOL_GPL(loongson_spi_dev_pm_ops)" in
		   spi-loongson-core.c for fix the compile issue which
		   loongson_spi_dev_pm_ops undefined.
Change in v5:
		1. Get rid of the clock patch's dependency and open-code the clock IDs.
		2. Fixup checkpatch issue that by installed ply and gitpython package
		   locally, but this series of patch's code doesn't have any change.
Change in v6:
		1. Remove the "#include <dt-bindings/clock/loongson,ls2k-clk.h>" in
		   yaml file.
Change in v7:
		1. Remove the "loongson,ls7a-spi" and change yaml file name as
		   "loongson,ls2k-spi.yaml".
		2. Use module_pci_driver and module_platform_driver to replace
		   module_init and module_exit.
		3. Drop ".owner	= THIS_MODULE" in spi platform driver.
		4. Add devm_spi_alloc_master devm_spi_register_master to simplify code.
		5. Add pci_disable_device() in loongson_spi_pci_unregister.
Change in v8:
		1. Add reviewed-by information for spi bindings patch.
		2. Fixup the uncorrect spi yaml file path in MAINTAINERS file.
		3. Add spi_master_suspend and spi_master_resume in spi pm function.

Yinbo Zhu (2):
  dt-bindings: spi: add loongson spi
  spi: loongson: add bus driver for the loongson spi controller

 .../bindings/spi/loongson,ls2k-spi.yaml       |  41 +++
 MAINTAINERS                                   |  10 +
 drivers/spi/Kconfig                           |  31 ++
 drivers/spi/Makefile                          |   3 +
 drivers/spi/spi-loongson-core.c               | 296 ++++++++++++++++++
 drivers/spi/spi-loongson-pci.c                |  72 +++++
 drivers/spi/spi-loongson-plat.c               |  47 +++
 drivers/spi/spi-loongson.h                    |  41 +++
 8 files changed, 541 insertions(+)

On Wed, Apr 19, 2023 at 02:22:02PM +0800, Yinbo Zhu wrote:

> +       clk = devm_clk_get(dev, NULL);
> +       if (!IS_ERR(clk))
> +               spi->clk_rate = clk_get_rate(clk);

I notice we never actually enable this clock.  I guess it's some system
clock which is needed for basic system functionality which is always on
and we just need the rate but it looks a bit off.

> +static int __maybe_unused loongson_spi_suspend(struct device *dev)
> +{
> +	struct loongson_spi *loongson_spi;
> +	struct spi_master *master;
> +
> +	master = dev_get_drvdata(dev);
> +	loongson_spi = spi_master_get_devdata(master);
> +
> +	loongson_spi->spcr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
> +	loongson_spi->sper = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG);
> +	loongson_spi->spsr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPSR_REG);
> +	loongson_spi->para = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_PARA_REG);
> +	loongson_spi->sfcs = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG);
> +	loongson_spi->timi = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_TIMI_REG);
> +
> +	spi_master_suspend(master);

This saves the register state before suspending at the SPI level but
that means that if there were any transfers in progress then the
register state might be changed by the active transfers after we've
saved the state, meaning we might restore a state for an active
transfer.  The spi_master_suspend() should go first, then save the
register state.  The resume is OK, it's just the suspend.

在 2023/4/19 下午8:36, Mark Brown 写道:
> On Wed, Apr 19, 2023 at 02:22:02PM +0800, Yinbo Zhu wrote:
> 
>> +       clk = devm_clk_get(dev, NULL);
>> +       if (!IS_ERR(clk))
>> +               spi->clk_rate = clk_get_rate(clk);
> 
> I notice we never actually enable this clock.  I guess it's some system
> clock which is needed for basic system functionality which is always on
> and we just need the rate but it looks a bit off.
The 2k1000 SoC's spi clock was used boot clock, which boot clock
was gain from system clock(ref clk) that by division and dobuling.

Currently, the spi clock was enabled in firmware, so driver doesn't need
to enable it.
> 
>> +static int __maybe_unused loongson_spi_suspend(struct device *dev)
>> +{
>> +	struct loongson_spi *loongson_spi;
>> +	struct spi_master *master;
>> +
>> +	master = dev_get_drvdata(dev);
>> +	loongson_spi = spi_master_get_devdata(master);
>> +
>> +	loongson_spi->spcr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
>> +	loongson_spi->sper = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG);
>> +	loongson_spi->spsr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPSR_REG);
>> +	loongson_spi->para = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_PARA_REG);
>> +	loongson_spi->sfcs = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG);
>> +	loongson_spi->timi = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_TIMI_REG);
>> +
>> +	spi_master_suspend(master);
> 
> This saves the register state before suspending at the SPI level but
> that means that if there were any transfers in progress then the
> register state might be changed by the active transfers after we've
> saved the state, meaning we might restore a state for an active
> transfer.  The spi_master_suspend() should go first, then save the
> register state.  The resume is OK, it's just the suspend.

okay, I got it.

Thanks.
>