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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Mar 2022 01:20:17.8885 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7fdb9412-d891-4ee1-044a-08da07b44c31 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.235]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT025.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3159 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add multiple chip selects and hardware wait state polling supported by Tegra Grace. Krishna Yarlagadda (3): spi: tegra210-quad: Multi-cs support spi: tegra210-quad: Add wait polling support spi: dt-bindings: Add wait state polling flag .../bindings/spi/nvidia,tegra210-quad.yaml | 6 ++ drivers/spi/spi-tegra210-quad.c | 64 ++++++++++++++++++- 2 files changed, 68 insertions(+), 2 deletions(-)