| Message ID | 20211220164625.9400-1-mika.westerberg@linux.intel.com |
|---|---|
| Headers | show |
| Series | mtd: spi-nor / spi / MFD: Convert intel-spi to SPI MEM | expand |
Hi Tudor and Mark, On Mon, Dec 20, 2021 at 07:46:22PM +0300, Mika Westerberg wrote: > Hi all, > > Based on discussion on the patch I sent some time ago here: > > http://lists.infradead.org/pipermail/linux-mtd/2021-June/086867.html > > it turns out that the preferred way to deal with the SPI flash controller > drivers is through SPI MEM which is part of Linux SPI subsystem. > > This series does that for the intel-spi driver. This also renames the > driver to follow the convention used in the SPI subsystem. The first patch > improves the write protection handling to be slightly more safer. The > following two patches do the conversion itself. Note the Intel SPI flash > controller only allows commands such as read, write and so on and it > internally uses whatever addressing etc. it figured from the SFDP on the > flash device. Any chance to get this one merged? Thanks!
On 1/11/22 8:49 AM, Mika Westerberg wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Hi Tudor and Mark, Hi! > > On Mon, Dec 20, 2021 at 07:46:22PM +0300, Mika Westerberg wrote: >> Hi all, >> >> Based on discussion on the patch I sent some time ago here: >> >> http://lists.infradead.org/pipermail/linux-mtd/2021-June/086867.html >> >> it turns out that the preferred way to deal with the SPI flash controller >> drivers is through SPI MEM which is part of Linux SPI subsystem. >> >> This series does that for the intel-spi driver. This also renames the >> driver to follow the convention used in the SPI subsystem. The first patch >> improves the write protection handling to be slightly more safer. The >> following two patches do the conversion itself. Note the Intel SPI flash >> controller only allows commands such as read, write and so on and it >> internally uses whatever addressing etc. it figured from the SFDP on the >> flash device. > > Any chance to get this one merged? > Sure, it's a candidate for 5.18. I don't have anything against the move to SPI, but I didn't get the chance to go through your series. Will try to do it. Cheers, ta
On 12/20/21 18:46, Mika Westerberg wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Currently the driver tries to disable the BIOS write protection > automatically even if this is not what the user wants. For this reason > modify the driver so that by default it does not touch the write > protection. Only if specifically asked by the user (setting writeable=1 > command line parameter) the driver tries to disable the BIOS write > protection. > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Reviewed-by: Mauro Lima <mauro.lima@eclypsium.com> > Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > drivers/mfd/lpc_ich.c | 59 +++++++++++++++++-- > .../mtd/spi-nor/controllers/intel-spi-pci.c | 29 +++++---- > drivers/mtd/spi-nor/controllers/intel-spi.c | 41 ++++++------- > include/linux/platform_data/x86/intel-spi.h | 6 +- > 4 files changed, 96 insertions(+), 39 deletions(-) >
On 12/20/21 18:46, Mika Westerberg wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Since the driver is renamed (and moved) update the BIOS upgrade guide > accordingly from intel-spi to spi-intel. Keep the guide under MTD > documentation because this is pretty much still about MTD and SPI-NOR. > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Reviewed-by: Mauro Lima <mauro.lima@eclypsium.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > Documentation/driver-api/mtd/index.rst | 2 +- > .../driver-api/mtd/{intel-spi.rst => spi-intel.rst} | 8 ++++---- > 2 files changed, 5 insertions(+), 5 deletions(-) > rename Documentation/driver-api/mtd/{intel-spi.rst => spi-intel.rst} (94%) > > diff --git a/Documentation/driver-api/mtd/index.rst b/Documentation/driver-api/mtd/index.rst > index 436ba5a851d7..6a4278f409d7 100644 > --- a/Documentation/driver-api/mtd/index.rst > +++ b/Documentation/driver-api/mtd/index.rst > @@ -7,6 +7,6 @@ Memory Technology Device (MTD) > .. toctree:: > :maxdepth: 1 > > - intel-spi > + spi-intel > nand_ecc > spi-nor > diff --git a/Documentation/driver-api/mtd/intel-spi.rst b/Documentation/driver-api/mtd/spi-intel.rst > similarity index 94% > rename from Documentation/driver-api/mtd/intel-spi.rst > rename to Documentation/driver-api/mtd/spi-intel.rst > index 0465f6879262..df854f20ead1 100644 > --- a/Documentation/driver-api/mtd/intel-spi.rst > +++ b/Documentation/driver-api/mtd/spi-intel.rst > @@ -1,5 +1,5 @@ > ============================== > -Upgrading BIOS using intel-spi > +Upgrading BIOS using spi-intel > ============================== > > Many Intel CPUs like Baytrail and Braswell include SPI serial flash host > @@ -11,12 +11,12 @@ avoid accidental (or on purpose) overwrite of the content. > Not all manufacturers protect the SPI serial flash, mainly because it > allows upgrading the BIOS image directly from an OS. > > -The intel-spi driver makes it possible to read and write the SPI serial > +The spi-intel driver makes it possible to read and write the SPI serial > flash, if certain protection bits are not set and locked. If it finds > any of them set, the whole MTD device is made read-only to prevent > partial overwrites. By default the driver exposes SPI serial flash > contents as read-only but it can be changed from kernel command line, > -passing "intel-spi.writeable=1". > +passing "spi_intel.writeable=1". > > Please keep in mind that overwriting the BIOS image on SPI serial flash > might render the machine unbootable and requires special equipment like > @@ -32,7 +32,7 @@ Linux. > serial flash. Distros like Debian and Fedora have this prepackaged with > name "mtd-utils". > > - 3) Add "intel-spi.writeable=1" to the kernel command line and reboot > + 3) Add "spi_intel.writeable=1" to the kernel command line and reboot > the board (you can also reload the driver passing "writeable=1" as > module parameter to modprobe). > > -- > 2.34.1 >
Hi all, Based on discussion on the patch I sent some time ago here: http://lists.infradead.org/pipermail/linux-mtd/2021-June/086867.html it turns out that the preferred way to deal with the SPI flash controller drivers is through SPI MEM which is part of Linux SPI subsystem. This series does that for the intel-spi driver. This also renames the driver to follow the convention used in the SPI subsystem. The first patch improves the write protection handling to be slightly more safer. The following two patches do the conversion itself. Note the Intel SPI flash controller only allows commands such as read, write and so on and it internally uses whatever addressing etc. it figured from the SFDP on the flash device. Previous versions of the patch series can be found here: v4: https://lore.kernel.org/linux-mtd/20211118130543.11179-1-mika.westerberg@linux.intel.com/ v3: https://lore.kernel.org/linux-mtd/20211013114432.31352-1-mika.westerberg@linux.intel.com/ v2: https://lore.kernel.org/linux-mtd/20211007112132.30934-1-mika.westerberg@linux.intel.com/ v1: https://lore.kernel.org/linux-mtd/20210930100719.2176-1-mika.westerberg@linux.intel.com/ Changes from v4: * Correct check in intel_spi_cmp_mem_op() * Added tag from Boris Changes from v3: * Create an array of supported opcodes and reject everything else. * Fix checkpatch warnings reported by Mauro * Added tags from Lee and Mauro Changes from v2: * Added tag from Andy * Check buswidth in intel_spi_supports_mem_op() and return false if octal mode is asked. The Intel controllers support buswidths 1-4 but this is not exposed to software. It figures this itself through SFDP tables. * In case of software sequencer, support same opcodes than we support with the hardware sequencer if found in the opcodes table. Changes from v1: * Arrange dependencies in Kconfig entries the same way in both glue drivers. * Added empty lines between different subsystem includes. * dev_err() to single line * Return intel_spi_sw_cycle() directly in intel_spi_erase(). * Drop redundant elses. * Fixed typo in the commit message of the patch 3/3. Mika Westerberg (3): mtd: spi-nor: intel-spi: Disable write protection only if asked mtd: spi-nor: intel-spi: Convert to SPI MEM Documentation / MTD: Rename the intel-spi driver Documentation/driver-api/mtd/index.rst | 2 +- .../mtd/{intel-spi.rst => spi-intel.rst} | 8 +- drivers/mfd/lpc_ich.c | 59 +- drivers/mtd/spi-nor/controllers/Kconfig | 36 - drivers/mtd/spi-nor/controllers/Makefile | 3 - drivers/mtd/spi-nor/controllers/intel-spi.h | 21 - drivers/spi/Kconfig | 39 + drivers/spi/Makefile | 3 + .../intel-spi-pci.c => spi/spi-intel-pci.c} | 49 +- .../spi-intel-platform.c} | 21 +- .../intel-spi.c => spi/spi-intel.c} | 827 ++++++++++++------ drivers/spi/spi-intel.h | 19 + include/linux/mfd/lpc_ich.h | 2 +- .../x86/{intel-spi.h => spi-intel.h} | 12 +- 14 files changed, 699 insertions(+), 402 deletions(-) rename Documentation/driver-api/mtd/{intel-spi.rst => spi-intel.rst} (94%) delete mode 100644 drivers/mtd/spi-nor/controllers/intel-spi.h rename drivers/{mtd/spi-nor/controllers/intel-spi-pci.c => spi/spi-intel-pci.c} (84%) rename drivers/{mtd/spi-nor/controllers/intel-spi-platform.c => spi/spi-intel-platform.c} (65%) rename drivers/{mtd/spi-nor/controllers/intel-spi.c => spi/spi-intel.c} (57%) create mode 100644 drivers/spi/spi-intel.h rename include/linux/platform_data/x86/{intel-spi.h => spi-intel.h} (64%)