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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id q128-v6sm3665503ljq.72.2018.09.03.14.50.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Sep 2018 14:50:42 -0700 (PDT) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org, Andrzej Hajda , Lorenzo Bianconi Cc: linux-gpio@vger.kernel.org, Rob Herring , Linus Walleij Subject: [PATCH 0/4] SPI 3WIRE fixes and highz turnaround Date: Mon, 3 Sep 2018 23:50:31 +0200 Message-Id: <20180903215035.17265-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org During review of the TPO TPG110 driver[1] it was noted that the protocol used is a variant of SPI 3WIRE[2] and the panel should be a SPI child device.[3] While trying to repurpose the driver to use the brand new 3WIRE support in SPI, I ran into a few rough edges (patches 1 & 2). If these are OK with Lorenzo they can probably be applied as-is. Then I had to add support for the special "high impedance turn-around cycle" to the SPI core and the GPIO bit-banging driver to be able to support the panel. It is now working fine and I have patches to use the panel as an SPI child device, but these patches are needed to get it going. References: [1]: https://lists.freedesktop.org/archives/dri-devel/2018-July/181848.html [2]: http://aitendo3.sakura.ne.jp/aitendo_data/product_img/lcd/tft/T43P00/TPG110%20Customer%20Spec_0.6.pdf [3]: https://lists.freedesktop.org/archives/dri-devel/2018-July/181993.html Linus Walleij (4): spi: core: Allow both TX and RX transfers in 3WIRE spi: gpio: Fix reading for 3WIRE spi: Add a DT binding for high impedance turnaround spi: gpio: Support 3WIRE high impedance turn-around .../devicetree/bindings/spi/spi-bus.txt | 4 ++ drivers/spi/spi-gpio.c | 41 +++++++++++++++---- drivers/spi/spi.c | 17 ++++++-- include/linux/spi/spi.h | 1 + 4 files changed, 52 insertions(+), 11 deletions(-) -- 2.17.1 Acked-by: Lorenzo Bianconi