diff mbox series

[v3,4/5] serial: 8250_exar: Remove old exar_ee_read() and other unneeded code

Message ID 9d3b61f6bf003206aebe4db9f32366cc8e214201.1727873292.git.pnewman@connecttech.com
State New
Headers show
Series serial: 8250_exar: Replace custom EEPROM code with eeprom_93cx6 | expand

Commit Message

Parker Newman Oct. 2, 2024, 2:14 p.m. UTC 
From: Parker Newman <pnewman@connecttech.com>

Remove the old exar_ee_read() and associated helper functions.
Remove defines that are no longer needed after the switch to using the
eeprom_93cx6 driver.
Add CTI_EE_MASK_OSC_FREQ define.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Parker Newman <pnewman@connecttech.com>
---
Changes in v3:
- Commit message wording.
- Rebased to v6.12-rc1.
- Remove CTI_EE_MASK_OSC_FREQ_LOWER and CTI_EE_MASK_OSC_FREQ_UPPER.
- Add CTI_EE_MASK_OSC_FREQ define.

 drivers/tty/serial/8250/8250_exar.c | 95 +----------------------------
 1 file changed, 2 insertions(+), 93 deletions(-)

--
2.46.0

Comments

Andy Shevchenko Oct. 2, 2024, 2:29 p.m. UTC | #1 
On Wed, Oct 02, 2024 at 10:14:10AM -0400, Parker Newman wrote:
> From: Parker Newman <pnewman@connecttech.com>
> 
> Remove the old exar_ee_read() and associated helper functions.
> Remove defines that are no longer needed after the switch to using the
> eeprom_93cx6 driver.
> Add CTI_EE_MASK_OSC_FREQ define.

Seems like you have a rebase issues (you folded changes to the wrong patch).

...

>  drivers/tty/serial/8250/8250_exar.c | 95 +----------------------------
>  1 file changed, 2 insertions(+), 93 deletions(-)

Shouldn't be + lines here.

...

> +#define CTI_EE_MASK_OSC_FREQ		GENMASK(31, 0)

...

>  	osc_freq = le16_to_cpu(ee_words[0]) | (le16_to_cpu(ee_words[1]) << 16);
> -	if (osc_freq == GENMASK(31, 0))
> +	if (osc_freq == CTI_EE_MASK_OSC_FREQ)
>  		return -EIO;

You just introduced the - variant in the previous patch.
So, squash these two changes in the patch that adds this new conditional check.
diff mbox series

Patch

diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
index c40e86920110..470e8128c79a 100644
--- a/drivers/tty/serial/8250/8250_exar.c
+++ b/drivers/tty/serial/8250/8250_exar.c
@@ -136,8 +136,6 @@ 
 #define UART_EXAR_REGB_EECS		BIT(5)
 #define UART_EXAR_REGB_EEDI		BIT(6)
 #define UART_EXAR_REGB_EEDO		BIT(7)
-#define UART_EXAR_REGB_EE_ADDR_SIZE	6
-#define UART_EXAR_REGB_EE_DATA_SIZE	16

 #define UART_EXAR_XR17C15X_PORT_OFFSET	0x200
 #define UART_EXAR_XR17V25X_PORT_OFFSET	0x200
@@ -190,8 +188,7 @@ 
 #define CTI_EE_OFF_XR17V35X_PORT_FLAGS	0x14  /* 1 word */

 #define CTI_EE_MASK_PORT_FLAGS_TYPE	GENMASK(7, 0)
-#define CTI_EE_MASK_OSC_FREQ_LOWER	GENMASK(15, 0)
-#define CTI_EE_MASK_OSC_FREQ_UPPER	GENMASK(31, 16)
+#define CTI_EE_MASK_OSC_FREQ		GENMASK(31, 0)

 #define CTI_FPGA_RS485_IO_REG		0x2008
 #define CTI_FPGA_CFG_INT_EN_REG		0x48
@@ -269,94 +266,6 @@  static inline u8 exar_read_reg(struct exar8250 *priv, unsigned int reg)
 	return readb(priv->virt + reg);
 }

-static inline void exar_ee_select(struct exar8250 *priv)
-{
-	// Set chip select pin high to enable EEPROM reads/writes
-	exar_write_reg(priv, UART_EXAR_REGB, UART_EXAR_REGB_EECS);
-	// Min ~500ns delay needed between CS assert and EEPROM access
-	udelay(1);
-}
-
-static inline void exar_ee_deselect(struct exar8250 *priv)
-{
-	exar_write_reg(priv, UART_EXAR_REGB, 0x00);
-}
-
-static inline void exar_ee_write_bit(struct exar8250 *priv, u8 bit)
-{
-	u8 value = UART_EXAR_REGB_EECS;
-
-	if (bit)
-		value |= UART_EXAR_REGB_EEDI;
-
-	// Clock out the bit on the EEPROM interface
-	exar_write_reg(priv, UART_EXAR_REGB, value);
-	// 2us delay = ~500khz clock speed
-	udelay(2);
-
-	value |= UART_EXAR_REGB_EECK;
-
-	exar_write_reg(priv, UART_EXAR_REGB, value);
-	udelay(2);
-}
-
-static inline u8 exar_ee_read_bit(struct exar8250 *priv)
-{
-	u8 regb;
-	u8 value = UART_EXAR_REGB_EECS;
-
-	// Clock in the bit on the EEPROM interface
-	exar_write_reg(priv, UART_EXAR_REGB, value);
-	// 2us delay = ~500khz clock speed
-	udelay(2);
-
-	value |= UART_EXAR_REGB_EECK;
-
-	exar_write_reg(priv, UART_EXAR_REGB, value);
-	udelay(2);
-
-	regb = exar_read_reg(priv, UART_EXAR_REGB);
-
-	return (regb & UART_EXAR_REGB_EEDO ? 1 : 0);
-}
-
-/**
- * exar_ee_read() - Read a word from the EEPROM
- * @priv: Device's private structure
- * @ee_addr: Offset of EEPROM to read word from
- *
- * Read a single 16bit word from an Exar UART's EEPROM.
- * The type of the EEPROM is AT93C46D.
- *
- * Return: EEPROM word
- */
-static u16 exar_ee_read(struct exar8250 *priv, u8 ee_addr)
-{
-	int i;
-	u16 data = 0;
-
-	exar_ee_select(priv);
-
-	// Send read command (opcode 110)
-	exar_ee_write_bit(priv, 1);
-	exar_ee_write_bit(priv, 1);
-	exar_ee_write_bit(priv, 0);
-
-	// Send address to read from
-	for (i = UART_EXAR_REGB_EE_ADDR_SIZE - 1; i >= 0; i--)
-		exar_ee_write_bit(priv, ee_addr & BIT(i));
-
-	// Read data 1 bit at a time starting with a dummy bit
-	for (i = UART_EXAR_REGB_EE_DATA_SIZE; i >= 0; i--) {
-		if (exar_ee_read_bit(priv))
-			data |= BIT(i);
-	}
-
-	exar_ee_deselect(priv);
-
-	return data;
-}
-
 static void exar_eeprom_93cx6_reg_read(struct eeprom_93cx6 *eeprom)
 {
 	struct exar8250 *priv = eeprom->data;
@@ -737,7 +646,7 @@  static int cti_read_osc_freq(struct exar8250 *priv, u8 eeprom_offset)
 	eeprom_93cx6_multiread(&priv->eeprom, eeprom_offset, ee_words, ARRAY_SIZE(ee_words));

 	osc_freq = le16_to_cpu(ee_words[0]) | (le16_to_cpu(ee_words[1]) << 16);
-	if (osc_freq == GENMASK(31, 0))
+	if (osc_freq == CTI_EE_MASK_OSC_FREQ)
 		return -EIO;

 	return osc_freq;