From patchwork Fri Dec 20 21:07:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 853418 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 88EF3227575; Fri, 20 Dec 2024 21:09:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734728954; cv=none; b=R2lnW5UHWJy7vjKMZ/Z80JRWMJk0EpjEriZVuPfZ8pkUMOPOYYzNkq4r+0gwAZERBq0bnXCltlA4rVDnL9RaiF3phlTWB1YEIn/zCv6dCtN5W3tA/9pfDiWyG55y01IacN9x+zB5hqtBiqM9kK2ZRcunY6y+4J9Mqc8yr+4kEfQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734728954; c=relaxed/simple; bh=/BHeA75p2Cn+kP5cxK8MIw+VO1rDeoCRJUoghk0DRRs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pyomImSrvJ8IhLEEs/uzB15xrKMNYLlPN6XmsKVNMW3wkkX22/bx35DrUuVS7bJxYKG6HN3zfvGnJL43zfAZ4/I6orAlfb8abWMlbOcKSQ7n0l5kBV9ZQ0rNkCOc2J1fC6M2nJ7XRWk7oCZVzKHQq7lZv7vvEhiQ1jUdLrqRNfk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=uVjrm523; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="uVjrm523" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1734728952; x=1766264952; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/BHeA75p2Cn+kP5cxK8MIw+VO1rDeoCRJUoghk0DRRs=; b=uVjrm523W3C3NYjFdl8plYtRzFQmqksVsV1f7poGTChW6aknvcDk1Nt0 wmOWogWT7tW8A2jlDf6ZlMLtTxUZ+lZ8Gq+1PUT7JOLEh5Ka5usbC6fCt h7M2G5Javue1htJZU8gxUC5T5XxkarfiKGeF4oRHgcQc+jurGN987/8n5 WwxKxCY5XMRE59LTCAcA+S+443nkWjJsLDXe29kZZgTJG6deggPjiEb93 MifOfPLGGy31wJbjHhC9kUyh1rHMH/qeav0NI8pZvbjKKE7h1wn4Oy7AG vXQWtn0m/u6roWDrjmVi/gS/N1IfuQxZo7Ps1RQ9gJySrWtRVrsoHHJIs w==; X-CSE-ConnectionGUID: 6Xn2bQedQHqhtDmL7ky2MQ== X-CSE-MsgGUID: Se/34m+nSA2AonXLlzKIJg== X-IronPort-AV: E=Sophos;i="6.12,251,1728975600"; d="scan'208";a="203274645" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 20 Dec 2024 14:09:09 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 20 Dec 2024 14:08:43 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 20 Dec 2024 14:08:43 -0700 From: To: , , , , , , , , CC: , , , , , , , , , , , , Conor Dooley , Krzysztof Kozlowski Subject: [PATCH v4 07/13] dt-bindings: clock: Add SAMA7D65 PMC compatible string Date: Fri, 20 Dec 2024 14:07:08 -0700 Message-ID: <9b8db610f477d5339830d12cd44f783eb5cb16ea.1734723585.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Dharma Balasubiramani Add the `microchip,sama7d65-pmc` compatible string to the existing binding, since the SAMA7D65 PMC shares the same properties and clock requirements as the SAMA7G5. Export MCK3 and MCK5 to be accessed and referenced in DT to assign to the clocks property for sama7d65 SoC. Signed-off-by: Dharma Balasubiramani Signed-off-by: Ryan Wanner Acked-by: Conor Dooley Reviewed-by: Claudiu Beznea Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml | 2 ++ include/dt-bindings/clock/at91.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml index c9eb60776b4d..885d47dd5724 100644 --- a/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml +++ b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml @@ -43,6 +43,7 @@ properties: - atmel,sama5d4-pmc - microchip,sam9x60-pmc - microchip,sam9x7-pmc + - microchip,sama7d65-pmc - microchip,sama7g5-pmc - const: syscon @@ -90,6 +91,7 @@ allOf: enum: - microchip,sam9x60-pmc - microchip,sam9x7-pmc + - microchip,sama7d65-pmc - microchip,sama7g5-pmc then: properties: diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h index 6ede88c3992d..d753559b912b 100644 --- a/include/dt-bindings/clock/at91.h +++ b/include/dt-bindings/clock/at91.h @@ -42,6 +42,10 @@ #define PMC_PLLADIV2 (PMC_MAIN + 11) #define PMC_LVDSPLL (PMC_MAIN + 12) +/* SAMA7D65 */ +#define PMC_MCK3 (PMC_MAIN + 13) +#define PMC_MCK5 (PMC_MAIN + 14) + #ifndef AT91_PMC_MOSCS #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ #define AT91_PMC_LOCKA 1 /* PLLA Lock */