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[175.159.121.22]) by smtp.googlemail.com with ESMTPSA id d2e1a72fcca58-719090d11e6sm2156984b3a.205.2024.09.10.22.08.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Sep 2024 22:08:26 -0700 (PDT) From: Nick Chan To: Krzysztof Kozlowski , Alim Akhtar , Greg Kroah-Hartman , Jiri Slaby , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: asahi@lists.linux.dev, Nick Chan , Neal Gompa , Janne Grunau Subject: [PATCH v5 2/3] tty: serial: samsung: Fix A7-A11 serial earlycon SError Date: Wed, 11 Sep 2024 13:02:12 +0800 Message-ID: <20240911050741.14477-3-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240911050741.14477-1-towinchenmi@gmail.com> References: <20240911050741.14477-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Apple's earlier SoCs, like A7-A11, requires 32-bit writes for the serial port. Otherwise, a SError happens when writing to UTXH (+0x20). This only manifested in earlycon as reg-io-width in the device tree is consulted for normal serial writes. Change the iotype of the port to UPIO_MEM32, to allow the serial port to function on A7-A11 SoCs. This change does not appear to affect Apple M1 and above. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Neal Gompa Tested-by: Janne Grunau Signed-off-by: Nick Chan --- drivers/tty/serial/samsung_tty.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index c4f2ac9518aa..3fdec06322ac 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -2536,7 +2536,7 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = { .name = "Apple S5L UART", .type = TYPE_APPLE_S5L, .port_type = PORT_8250, - .iotype = UPIO_MEM, + .iotype = UPIO_MEM32, .fifosize = 16, .rx_fifomask = S3C2410_UFSTAT_RXMASK, .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, @@ -2822,6 +2822,9 @@ OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup); static int __init apple_s5l_early_console_setup(struct earlycon_device *device, const char *opt) { + /* Apple A7-A11 requires MMIO32 register accesses. */ + device->port.iotype = UPIO_MEM32; + /* Close enough to S3C2410 for earlycon... */ device->port.private_data = &s3c2410_early_console_data;