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AJvYcCWgmXIMVPDPZCURDU1QwRAt0AIQFcNWXQuZef8YTx3BzPmgty7mMfAXPEYGro+iz2L8Ycx4D4RPEQZ/Tr9/1yC084Rm+7r1hVIMuEqi X-Gm-Message-State: AOJu0Yw84Fgo7rNCwOLb0aQiWTGFchxy8DpcVa8aHSWY7atOXPBTF3SA oG1GkcbYrBCGqUZ33rgEVrIVKxlk+cCfsH4BgSE2iLTFcyAcZlbI0octr+K75w1tK14lu4fLywY = X-Google-Smtp-Source: AGHT+IFjFsK7b5jeJuRmXNUJeTh0/w0Lyx/zDUdM1spc/2b7tXWGJLUB/NlaOIxAnXtZTLPBHn40MA== X-Received: by 2002:a17:903:2448:b0:1f6:74e6:1ec1 with SMTP id d9443c01a7336-1f674e62022mr75670415ad.68.1717516912287; Tue, 04 Jun 2024 09:01:52 -0700 (PDT) Received: from dianders.sjc.corp.google.com ([2620:15c:9d:2:3609:ff79:4625:8a71]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f632358519sm86118385ad.82.2024.06.04.09.01.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Jun 2024 09:01:51 -0700 (PDT) From: Douglas Anderson To: Greg Kroah-Hartman , Jiri Slaby Cc: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Andy Shevchenko , linux-arm-msm@vger.kernel.org, Konrad Dybcio , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, John Ogness , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Yicong Yang , Tony Lindgren , Stephen Boyd , Johan Hovold , Bjorn Andersson , Douglas Anderson , Rob Herring , Vijaya Krishna Nivarthi Subject: [PATCH v3 4/7] serial: qcom-geni: Introduce qcom_geni_serial_poll_bitfield() Date: Tue, 4 Jun 2024 09:00:30 -0700 Message-ID: <20240604090028.v3.4.Ic6411eab8d9d37acc451705f583fb535cd6dadb2@changeid> X-Mailer: git-send-email 2.45.1.288.g0e0cd299f1-goog In-Reply-To: <20240604160123.2029413-1-dianders@chromium.org> References: <20240604160123.2029413-1-dianders@chromium.org> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 With a small modification the qcom_geni_serial_poll_bit() function could be used to poll more than just a single bit. Let's generalize it. We'll make the qcom_geni_serial_poll_bit() into just a wrapper of the general function. Signed-off-by: Douglas Anderson --- The new function isn't used yet (except by the wrapper) but will be used in a future change. (no changes since v2) Changes in v2: - New drivers/tty/serial/qcom_geni_serial.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index e5effc2f5878..c4c54359d32d 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -264,8 +264,8 @@ static bool qcom_geni_serial_secondary_active(struct uart_port *uport) return readl(uport->membase + SE_GENI_STATUS) & S_GENI_CMD_ACTIVE; } -static bool qcom_geni_serial_poll_bit(struct uart_port *uport, - unsigned int offset, u32 field, bool set) +static bool qcom_geni_serial_poll_bitfield(struct uart_port *uport, + unsigned int offset, u32 field, u32 val) { u32 reg; unsigned long timeout_us; @@ -295,7 +295,7 @@ static bool qcom_geni_serial_poll_bit(struct uart_port *uport, timeout_us = DIV_ROUND_UP(timeout_us, 10) * 10; while (timeout_us) { reg = readl(uport->membase + offset); - if ((bool)(reg & field) == set) + if ((reg & field) == val) return true; udelay(10); timeout_us -= 10; @@ -303,6 +303,12 @@ static bool qcom_geni_serial_poll_bit(struct uart_port *uport, return false; } +static bool qcom_geni_serial_poll_bit(struct uart_port *uport, + unsigned int offset, u32 field, bool set) +{ + return qcom_geni_serial_poll_bitfield(uport, offset, field, set ? field : 0); +} + static void qcom_geni_serial_setup_tx(struct uart_port *uport, u32 xmit_size) { u32 m_cmd;