Message ID | 20240419120531.3775919-3-manikanta.guntupalli@amd.com |
---|---|
State | Superseded |
Headers | show
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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by SN1PEPF00036F3E.mail.protection.outlook.com (10.167.248.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7452.22 via Frontend Transport; Fri, 19 Apr 2024 12:06:09 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 19 Apr 2024 07:06:07 -0500 Received: from xhdsneeli40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 19 Apr 2024 07:06:02 -0500 From: Manikanta Guntupalli <manikanta.guntupalli@amd.com> To: <git@amd.com>, <gregkh@linuxfoundation.org>, <jirislaby@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>, <michal.simek@amd.com>, <p.zabel@pengutronix.de>, <laurent.pinchart@ideasonboard.com>, <radhey.shyam.pandey@amd.com>, <parth.gajjar@amd.com>, <u.kleine-koenig@pengutronix.de>, <tglx@linutronix.de>, <julien.malik@unseenlabs.fr>, <ruanjinjie@huawei.com>, <linux-kernel@vger.kernel.org>, <linux-serial@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> CC: <srinivas.goud@amd.com>, <shubhrajyoti.datta@amd.com>, <manion05gk@gmail.com>, Manikanta Guntupalli <manikanta.guntupalli@amd.com> Subject: [PATCH 2/3] arm64: zynqmp: Add resets property for UART nodes Date: Fri, 19 Apr 2024 17:35:30 +0530 Message-ID: <20240419120531.3775919-3-manikanta.guntupalli@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240419120531.3775919-1-manikanta.guntupalli@amd.com> References: <20240419120531.3775919-1-manikanta.guntupalli@amd.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: <linux-serial.vger.kernel.org> List-Subscribe: <mailto:linux-serial+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-serial+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: manikanta.guntupalli@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3E:EE_|SJ2PR12MB7799:EE_ X-MS-Office365-Filtering-Correlation-Id: 94212e1e-f179-4a50-28d4-08dc606919b7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Add support for uartps controller reset
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expand
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diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 25d20d803230..935504424ec6 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -906,6 +906,7 @@ uart0: serial@ff000000 { reg = <0x0 0xff000000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&zynqmp_firmware PD_UART_0>; + resets = <&zynqmp_reset ZYNQMP_RESET_UART0>; }; uart1: serial@ff010000 { @@ -917,6 +918,7 @@ uart1: serial@ff010000 { reg = <0x0 0xff010000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&zynqmp_firmware PD_UART_1>; + resets = <&zynqmp_reset ZYNQMP_RESET_UART1>; }; usb0: usb@ff9d0000 {
Add resets property for UART0 and UART1 nodes Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++ 1 file changed, 2 insertions(+)