From patchwork Mon Apr 1 10:10:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao via B4 Relay X-Patchwork-Id: 785760 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F215134B7; Mon, 1 Apr 2024 10:10:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711966255; cv=none; b=JaJGmO9B4cZNMSIuyR8ink9awagLUqto6ZklMfbvVWVIOwOGH6RidbfsCy3OUQN3JF6TbOUHXqKk7Mp5ILNOs4z2eZeouLkOZxZhtGhD/m/MVCR6U4OkbZlgsrKQ23h6L0UO6qMRkQJ5V7uFzavqdsF+LEI0UYD0grbI42e+RuE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711966255; c=relaxed/simple; bh=6UGLqY9odgzIryo++HHG92e44N/TaIRCAft0GJGAV94=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KSNy9LLviklrfOQ6SSjNkvM89aWCi/tB7VoAOMWGdWy86cXFhqWuC0dJZkQlkN6euHZjVLyPsjhgf17fahJqtgoB0ZZ2+mTfP6ZE5vVo/LLm7pIKE6xjwIkeXHsAH3LMp4sAZsofwonc6YV8BNi+FUACeA6ZWTYCTfpbG6bBsCk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=BpQ6uj5+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BpQ6uj5+" Received: by smtp.kernel.org (Postfix) with ESMTPS id 185EEC43142; Mon, 1 Apr 2024 10:10:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711966255; bh=6UGLqY9odgzIryo++HHG92e44N/TaIRCAft0GJGAV94=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=BpQ6uj5+YpkoDAkec+fiSN0D3db8DTNxr8cjDO+8cNg+PYc1hItriDMBxpcN08nN5 mJjmCvYs3DhT/Ldoy+fJeh3iqwkH+/JIqoN/d/XIQE7aMiaFZys/C0py6Wt6DqRtjt hiLaBEOkaGygQgoWs96awpX0v4dDEJCuIMX8THg2VtKPj6lEI8UvUjyh73qyoFvNPQ 0ehg2zj0cbshbzgc3M/MOYr/GtQrj8SFL/E7u4Hd7sRCsLRbBaidFpVXRfbIU4ElQ6 e+9CJlDIgZ1znBxebqwN6IebTIq5/aiq5/lY5Ha2ZmC3M9M2yieHtWcWdt8x5pEV0Z P5xIqgYGovrCg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AB26CD1288; Mon, 1 Apr 2024 10:10:55 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Mon, 01 Apr 2024 18:10:53 +0800 Subject: [PATCH v3 5/5] arm64: dts: add support for A5 based Amlogic AV400 Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240401-basic_dt-v3-5-cb29ae1c16da@amlogic.com> References: <20240401-basic_dt-v3-0-cb29ae1c16da@amlogic.com> In-Reply-To: <20240401-basic_dt-v3-0-cb29ae1c16da@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-serial@vger.kernel.org, Xianwei Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1711966253; l=3327; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=Dl4srjRZCo288fxVGeVbl9OCj623WT1z94/SvifjCLU=; b=7eYoRxg8m6HkOJPtSq+qik4iXOON1xb7oHenYqzrID0UuQUnaAjlRLb9MxU8Hc4eB1PS574N9 Hk6QWjRAG/HC7IKjGZZWEVNWAIWnDo2hN3aKKoOEheeE4vIcR4MiUDQ X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Amlogic A5 is an application processor designed for smart audio and IoT applications. Add basic support for the A5 based Amlogic AV400 board, which describes the following components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../boot/dts/amlogic/amlogic-a5-a113x2-av400.dts | 42 ++++++++++++++++++++++ arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 40 +++++++++++++++++++++ 3 files changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 9a50ec11bb8d..154c9efb26e4 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb +dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5-a113x2-av400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a5-a113x2-av400.dts new file mode 100644 index 000000000000..11d8b88c1ce5 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5-a113x2-av400.dts @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-a5.dtsi" + +/ { + model = "Amlogic A113X2 av400 Development Board"; + compatible = "amlogic,av400", "amlogic,a5"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_b; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 10 MiB reserved for ARM Trusted Firmware */ + secmon_reserved: secmon@5000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x05000000 0x0 0xa00000>; + no-map; + }; + }; +}; + +&uart_b { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi new file mode 100644 index 000000000000..43f68a7da2f7 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + */ + +#include "amlogic-a4-common.dtsi" +/ { + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x100>; + enable-method = "psci"; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x200>; + enable-method = "psci"; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x300>; + enable-method = "psci"; + }; + }; +};