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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jul 2023 11:38:17.8289 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f8e297b3-7f28-468a-9414-08db7bb9fefe X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT115.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4284 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org If the Tegra serial driver is probe before clocks are available then the following error is seen on boot: serial-tegra 3100000.serial: Couldn't get the clock This has been observed on Jetson AGX Orin. Fix this by calling dev_err_probe() instead of dev_err() to avoid printing an error on probe deferral. Fixes: e9ea096dd225 ("serial: tegra: add serial driver") Signed-off-by: Jon Hunter --- drivers/tty/serial/serial-tegra.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index 1cf08b33456c..848ea53a26bd 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -1591,10 +1591,8 @@ static int tegra_uart_probe(struct platform_device *pdev) return PTR_ERR(u->membase); tup->uart_clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(tup->uart_clk)) { - dev_err(&pdev->dev, "Couldn't get the clock\n"); - return PTR_ERR(tup->uart_clk); - } + if (IS_ERR(tup->uart_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(tup->uart_clk), "Couldn't get the clock"); tup->rst = devm_reset_control_get_exclusive(&pdev->dev, "serial"); if (IS_ERR(tup->rst)) {