@@ -158,6 +158,7 @@ struct sci_port {
bool has_rtscts;
bool autorts;
+ bool is_rz_sci;
};
#define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
@@ -2937,7 +2938,7 @@ static int sci_init_single(struct platform_device *dev,
port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
port->fifosize = sci_port->params->fifosize;
- if (port->type == PORT_SCI) {
+ if (port->type == PORT_SCI && !sci_port->is_rz_sci) {
if (sci_port->reg_size >= 0x20)
port->regshift = 2;
else
@@ -3353,6 +3354,11 @@ static int sci_probe(struct platform_device *dev)
sp = &sci_ports[dev_id];
platform_set_drvdata(dev, sp);
+ if (of_device_is_compatible(dev->dev.of_node, "renesas,r9a07g043-sci") ||
+ of_device_is_compatible(dev->dev.of_node, "renesas,r9a07g044-sci") ||
+ of_device_is_compatible(dev->dev.of_node, "renesas,r9a07g054-sci"))
+ sp->is_rz_sci = 1;
+
ret = sci_probe_single(dev, dev_id, p, sp);
if (ret)
return ret;
SCI IP on RZ/G2L alike SoCs do not need regshift compared to other SCI IPs on the SH platform. Currently, it does regshift and configuring Rx wrongly. Drop adding regshift for RZ/G2L alike SoCs. Fixes: f9a2adcc9e90 ("arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes") Cc: stable@vger.kernel.org Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v3: * New patch. --- drivers/tty/serial/sh-sci.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)