From patchwork Tue Mar 14 02:18:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ChiaWei Wang X-Patchwork-Id: 663264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD915C6FD19 for ; Tue, 14 Mar 2023 02:19:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229805AbjCNCTU (ORCPT ); Mon, 13 Mar 2023 22:19:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230105AbjCNCTG (ORCPT ); Mon, 13 Mar 2023 22:19:06 -0400 Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2F3293E3B for ; Mon, 13 Mar 2023 19:18:48 -0700 (PDT) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 32E24ACY072546; Tue, 14 Mar 2023 10:04:10 +0800 (GMT-8) (envelope-from chiawei_wang@aspeedtech.com) Received: from Chiawei-PC03.aspeed.com (192.168.2.66) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 14 Mar 2023 10:18:20 +0800 From: Chia-Wei Wang To: , , , , , , , , , , , , , , , Subject: [PATCH v2 5/5] ARM: dts: aspeed-g6: Add UDMA node Date: Tue, 14 Mar 2023 10:18:17 +0800 Message-ID: <20230314021817.30446-6-chiawei_wang@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314021817.30446-1-chiawei_wang@aspeedtech.com> References: <20230314021817.30446-1-chiawei_wang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.66] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 32E24ACY072546 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add the device tree node for the UART DMA (UDMA) controller. Signed-off-by: Chia-Wei Wang --- arch/arm/boot/dts/aspeed-g6.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 8246a60de0d0..fe0633660f81 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -863,6 +863,15 @@ fsim1: fsi@1e79b100 { clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; status = "disabled"; }; + + udma: dma-controller@1e79e000 { + compatible = "aspeed,ast2600-udma"; + reg = <0x1e79e000 0x1000>; + interrupts = ; + dma-channels = <14>; + #dma-cells = <1>; + status = "disabled"; + }; }; }; };