From patchwork Thu Jan 5 12:47:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 640539 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D264C53210 for ; Thu, 5 Jan 2023 12:48:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233135AbjAEMsL (ORCPT ); Thu, 5 Jan 2023 07:48:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232952AbjAEMsC (ORCPT ); Thu, 5 Jan 2023 07:48:02 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3558F4C713; Thu, 5 Jan 2023 04:48:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672922882; x=1704458882; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+pRn7tKtyQDsfv1krVYAXZzmvcjDEgr9X9ccC6JVXzQ=; b=gqHIEoFRLLtb4C0Kp/n6LkpWJCwcKLZETDVgcVekzXBQCbGFX9x6tcZF yMIkVGmgmGW76+dPoB4aXHOJmNDI+ytf7ymQHz9bK+ezVEUuUGqc3iLAv E4vdetykF8Aq3HmA/1utJYmNs1lyjpftLumWiE20/5FeVeofSr/SkzAly q2bMLYGOdduRQ9mHF4OmCubrSVOjBnc3aNrVIl03bp9ktsojONoLQa2Eg 61V09aSl1DRmEX9sibmEKdTb11EK3Y8FEo66zVIwO1LRE6Q5ZkFearbd6 Qjh6ZTGKE30WUDaXVg5ixLQaYHVyVhAFuwanASYpQs1ZWHIIy8zUKQZUm A==; X-IronPort-AV: E=McAfee;i="6500,9779,10580"; a="301889830" X-IronPort-AV: E=Sophos;i="5.96,302,1665471600"; d="scan'208";a="301889830" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jan 2023 04:48:02 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10580"; a="984287791" X-IronPort-AV: E=Sophos;i="5.96,302,1665471600"; d="scan'208";a="984287791" Received: from khaunx-mobl1.ger.corp.intel.com (HELO ijarvine-MOBL2.ger.corp.intel.com) ([10.252.35.181]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jan 2023 04:48:00 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: linux-serial@vger.kernel.org, Greg Kroah-Hartman , Jiri Slaby , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v2 2/3] serial: 8250_rt288x: Name non-standard divisor latch reg Date: Thu, 5 Jan 2023 14:47:43 +0200 Message-Id: <20230105124744.105950-3-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230105124744.105950-1-ilpo.jarvinen@linux.intel.com> References: <20230105124744.105950-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Instead of a literal, add proper name for the non-standard divisor latch register. Signed-off-by: Ilpo Järvinen --- drivers/tty/serial/8250/8250_rt288x.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/8250/8250_rt288x.c b/drivers/tty/serial/8250/8250_rt288x.c index cb9a86bd3a07..3015afb99722 100644 --- a/drivers/tty/serial/8250/8250_rt288x.c +++ b/drivers/tty/serial/8250/8250_rt288x.c @@ -12,6 +12,8 @@ #include "8250.h" +#define RT288X_DL 0x28 + #define UART_REG_UNMAPPED -1 /* Au1x00/RT288x UART hardware has a weird register layout */ @@ -60,12 +62,12 @@ static void au_serial_out(struct uart_port *p, int offset, int value) /* Au1x00 haven't got a standard divisor latch */ static int au_serial_dl_read(struct uart_8250_port *up) { - return __raw_readl(up->port.membase + 0x28); + return __raw_readl(up->port.membase + RT288X_DL); } static void au_serial_dl_write(struct uart_8250_port *up, int value) { - __raw_writel(value, up->port.membase + 0x28); + __raw_writel(value, up->port.membase + RT288X_DL); } int au_platform_setup(struct plat_serial8250_port *p)