diff mbox series

[v2,6/7] tty: xilinx_uartps: Add timeout waiting for loop

Message ID 20220729114748.18332-7-shubhrajyoti.datta@xilinx.com
State New
Headers show
Series tty: xilinx_uartps: fixes and improvements | expand

Commit Message

Shubhrajyoti Datta July 29, 2022, 11:47 a.m. UTC 
There is a potential infinite loop while waiting for the 
the TXFULL to deassert. Adds the error message and timeout to
avoid infinite loop if it fails to get the TX fifo not full.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
---
 drivers/tty/serial/xilinx_uartps.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index e119da69e190..a1ff03f24f51 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -1147,8 +1147,20 @@  static void cdns_uart_console_putchar(struct uart_port *port, unsigned char ch)
 		}
 		cpu_relax();
 	}
-	while (readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXFULL)
+
+	timeout = jiffies + msecs_to_jiffies(1000);
+	while (1) {
+		ctrl_reg = readl(port->membase + CDNS_UART_SR);
+
+		if (!(ctrl_reg & CDNS_UART_SR_TXFULL))
+			break;
+		if (time_after(jiffies, timeout)) {
+			dev_warn(port->dev,
+				 "timeout waiting for TX fifo\n");
+			return;
+		}
 		cpu_relax();
+	}
 	writel(ch, port->membase + CDNS_UART_FIFO);
 }