From patchwork Wed Jun 8 09:54:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 580192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14B2CC43334 for ; Wed, 8 Jun 2022 10:10:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236025AbiFHKKk (ORCPT ); Wed, 8 Jun 2022 06:10:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235990AbiFHKJq (ORCPT ); Wed, 8 Jun 2022 06:09:46 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 426D51D9B48; Wed, 8 Jun 2022 02:55:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654682102; x=1686218102; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MWcjADPcy+1mXPm4mR4npKVQZi0EcX9q8P+2uwttuo0=; b=MS2HQudP9ukVgRgGItxRZ3TTgcdgrRNQbIX9A6vQCDoDypIDcBoCWqf0 tXkypFDLe+rcSI8J6i/ZDyo/zm1Q7qbJj8ETvjq9b8jv27P4OWS+p6oH5 vdh0foN4OtPOo6M7fmgQPrV4zmNmeYQStL3Y1+1A78TPHemX8t+wecUhp nhmS+wB8moXpwUnkLgc+Vsxo3aJHx3IzRLWZoLWGl/85z4Is/7j8qnqQ4 IUd5pTWGX8t/pnSoXcdMthas68yd4wFVLGAZkfCjpS2XP+/ZTRX9kVECQ GgFnnU10vBiJiNaI9X4W7bw/gu1/UljOQ7wUh12/9klALHE9KfcnBdo9h A==; X-IronPort-AV: E=McAfee;i="6400,9594,10371"; a="278019577" X-IronPort-AV: E=Sophos;i="5.91,286,1647327600"; d="scan'208";a="278019577" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2022 02:55:01 -0700 X-IronPort-AV: E=Sophos;i="5.91,286,1647327600"; d="scan'208";a="584783570" Received: from bmichals-mobl.ger.corp.intel.com (HELO ijarvine-MOBL2.ger.corp.intel.com) ([10.252.57.131]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2022 02:54:58 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: linux-serial@vger.kernel.org, Greg KH , Jiri Slaby , Andy Shevchenko , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Douglas Anderson , Miquel Raynal , Phil Edworthy , linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko Subject: [PATCH v4 5/6] serial: 8250_dw: Use serial_lsr_in() in dw8250_handle_irq() Date: Wed, 8 Jun 2022 12:54:30 +0300 Message-Id: <20220608095431.18376-6-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220608095431.18376-1-ilpo.jarvinen@linux.intel.com> References: <20220608095431.18376-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org dw8250_handle_irq() reads LSR under a few conditions, convert both to use serial_lsr_in() in order to preserve LSR flags properly across reads. Cc: Douglas Anderson Cc: Phil Edworthy Cc: Miquel Raynal Fixes: 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt") Fixes: aa63d786cea2 ("serial: 8250: dw: Add support for DMA flow controlling devices") Reviewed-by: Andy Shevchenko Signed-off-by: Ilpo Järvinen --- drivers/tty/serial/8250/8250_dw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index f57bbd32ef11..1fae45991812 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -253,7 +253,7 @@ static int dw8250_handle_irq(struct uart_port *p) */ if (!up->dma && rx_timeout) { spin_lock_irqsave(&p->lock, flags); - status = p->serial_in(p, UART_LSR); + status = serial_lsr_in(up); if (!(status & (UART_LSR_DR | UART_LSR_BI))) (void) p->serial_in(p, UART_RX); @@ -263,7 +263,7 @@ static int dw8250_handle_irq(struct uart_port *p) /* Manually stop the Rx DMA transfer when acting as flow controller */ if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) { - status = p->serial_in(p, UART_LSR); + status = serial_lsr_in(up); if (status & (UART_LSR_DR | UART_LSR_BI)) { dw8250_writel_ext(p, RZN1_UART_RDMACR, 0); dw8250_writel_ext(p, DW_UART_DMASA, 1);