@@ -12,7 +12,7 @@
#define WDTRSTCR_RESET 0xA55A0002
#define WDTRSTCR 0x0054
-#define V3U_WDTRSTCR 0x0010
+#define GEN4_WDTRSTCR 0x0010
#define CR7BAR 0x0070
#define CR7BAREN BIT(4)
@@ -28,9 +28,9 @@ static int rcar_rst_enable_wdt_reset(void __iomem *base)
return 0;
}
-static int v3u_rst_enable_wdt_reset(void __iomem *base)
+static int rcar_rst_gen4_enable_wdt_reset(void __iomem *base)
{
- iowrite32(WDTRSTCR_RESET, base + V3U_WDTRSTCR);
+ iowrite32(WDTRSTCR_RESET, base + GEN4_WDTRSTCR);
return 0;
}
@@ -73,9 +73,9 @@ static const struct rst_config rcar_rst_gen3 __initconst = {
.set_rproc_boot_addr = rcar_rst_set_gen3_rproc_boot_addr,
};
-static const struct rst_config rcar_rst_r8a779a0 __initconst = {
+static const struct rst_config rcar_rst_gen4 __initconst = {
.modemr = 0x00, /* MODEMR0 and it has CPG related bits */
- .configure = v3u_rst_enable_wdt_reset,
+ .configure = rcar_rst_gen4_enable_wdt_reset,
};
static const struct of_device_id rcar_rst_matches[] __initconst = {
@@ -109,7 +109,9 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
{ .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
/* R-Car V3U */
- { .compatible = "renesas,r8a779a0-rst", .data = &rcar_rst_r8a779a0 },
+ { .compatible = "renesas,r8a779a0-rst", .data = &rcar_rst_gen4 },
+ /* R-Car Gen4 */
+ { .compatible = "renesas,r8a779f0-rst", .data = &rcar_rst_gen4 },
{ /* sentinel */ }
};
Add support for R-Car S4-8 (R8A779F0) to the R-Car RST driver. The register map of R-Car S4-8 is the same as R-Car V3U so that renames "V3U" and "r8a779a0" with "Gen4". Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- drivers/soc/renesas/rcar-rst.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-)