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Ivanov" , "Lee, Chun-Yi" , Chester Lin Subject: [PATCH 4/8] arm64: dts: add NXP S32G2 support Date: Thu, 5 Aug 2021 14:54:25 +0800 Message-ID: <20210805065429.27485-5-clin@suse.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210805065429.27485-1-clin@suse.com> References: <20210805065429.27485-1-clin@suse.com> X-ClientProxiedBy: AM3PR05CA0135.eurprd05.prod.outlook.com (2603:10a6:207:3::13) To VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost (118.166.54.149) by AM3PR05CA0135.eurprd05.prod.outlook.com (2603:10a6:207:3::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.15 via Frontend Transport; Thu, 5 Aug 2021 06:55:11 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 685e81ec-8238-49db-a8af-08d957ddf87c X-MS-TrafficTypeDiagnostic: VI1PR0401MB2368: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1186; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: riBkHNOKX0JtspFFEMH+/pakwQVu/kwBOsgbVQdlvsHY8HaDeEuw3ae+pIRlXHSS5zeX9Q9HGXTaRAALhq/tYWOY2nzcAAFW0ePtMiWmoBVY3tFsTq67S3GJblX8VYbTAz5at4tldupnAtGd55rmqkSZ8RZoFTIy5KJAEUvLNxtic4qKxxSNZJVQRkctViSd9L6/wOCD2k95lvySZOVzI0pAQtxuyE0OqhAW8sVzitYuWirDuXLRye56B5SWCP4rpWCRIiBdhqze6fCjUsXzCqH6rbdt+CZMfS432h58zbVXgV1R2YalTWLm9Z6y+HZ/0fE3hTEk4mwdYI+0RYVKUi+6vtByrLBLvShQIureKeYTE5n2WoaSpgJKJJ95i2h98p1pDwuDhV/7I/4yAn7uKcEjIvqc8slmLmBwZE0PWXAk8XQk20cm+TJFrud0WaANV3s75Rzed218lZbyEYACMh1bebPdu7xXjL+KUMpVNlz1oOhbI4weMyH4iMf9vxChtkRpp8zkPw3ew8Hr6qa5IqWa/gNBHN2Q4VT2hK7UgVVnNMXlB33HNmp8de/vimXvkRRB6SwV+63BUTER/dfIjljf/oSNAjcb4ugZcEDysDYTqVH2LlMPsHMhnUb0nvy8oTpH2Mn5cL0CDby9+5hbMQ== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR0402MB3439.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(366004)(8676002)(86362001)(6666004)(8936002)(66946007)(66476007)(66556008)(956004)(2616005)(508600001)(1076003)(5660300002)(26005)(4326008)(7416002)(6486002)(186003)(36756003)(107886003)(2906002)(54906003)(38100700002)(55236004)(316002)(6496006); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: edSvwQiXqFu5pJ4rX1FGqWHf3V2Dy7rYfOqd0lmlB/OJ9YtHwGLKzM6xtIGHgafF+zIkGu1EPPPSgrdtA2GOuUJVCwL025Tn6hpL3o0MXempanOg/PTMXudjmTttM+ZkKwlEEnpvcA2/d3/IqUy1lJyp6QT+yKyAKB3Fz+YQ2Rqvxi3NYaSTYeRpo8+8WaU5ZGrPBwfz5wbbbq9/+OqKm4vW3z/6Wb37vVgJSRENhrimbBV3Y/q95Q5x4CPSJaaEYhEpyhv28YelKZpxIyFSv59l8C/3FEJu+0iGOi0aTijJ2BN2MlhqiqzhK0rk+rzNPLWb3IeRnhPdHS9vDPtdCSMm8tBRaTT7Dl9EbIUvZhoKIz1qSNHpJpl+Ge2MV7j99f+ZOeBnquOPSXYMy8Di5+Pj+2x5FR2Cjyp9ZuCRLFE6YKLc0PwC0b1R2adBZKjxEiYCIG2VUUc0GAIVwAWih25bRcCaCQCCOm3UP6sgzhBbalPoZzYX2LbeVDV4bQabg++XYr4EtD6LFJ2+qEicBzm9enP0eqAhfDlUGPax5fKKjTbexD1b62r46wPXx+oYJ+mVJJlhHIDw3m1+VDpQ5QfXFi5QNTe3YyBIUthJxroL1oMvgfy3DS9b6mGenbiHL8MNmkedce8XTQAzYQXUtxU3ar8nTwrQwcQ9TTZOQm0IVa+m0+3zVKpMlAbfrD4JYvNVRQ/aCGdA/OtspMTkyRxu3C7+/XnadZoDKGjPf15AujTbbS3qiQFqW95daFncrSsaquzlbby7HRbudJXkijjO389WVMz5ta5PWnyZJUEj5Al5k8/art974vcV+OevRQr8ctigGikpejK1k63b0fSxU1kDubvJESGl86DR54MUd4acgz7IQqJ4yESlEzgu4Ghv+5x6jE1Z9hBX5LdHU4mH5Eh01gpC8gd9ehB1pd7G8+Cp2OkMzVZ8SMivq0iI2eL2Mee3kzccWuJGkhFbXqANz7F4TWSN2Zs13GoTbM5CvOr4BJhV0zaP+RnoQ1o23Q4hSS7baimdcq+1t2U1BAuMd3JlJ7WOUxrbxcs36jRUwYXKruLik2s/Mtq+H+SyRBaXpPyIX3mEwrTi5SUc17qWFLEZKv9HrzlRFYZhC0kdr1BGBgo+grQfBrdE7y3OUjYJf+gqP1DaBetEnILWGcBToom4Y+Ik7is7Guosf2lehu7jkH4Fy8KDu1q5KEZ57eTVKrR01EMjlZT4kwUUkvrx6Ekb53Kfe+57ZZsnvYspasHXo5lEINhufRAE8zlnSy7Nj2nMN5BDQ9hnhEM3BXLANCmj5rGXjTD4erAHJD5wj4XWQdjeCRXFlZ6cDKep X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 685e81ec-8238-49db-a8af-08d957ddf87c X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3439.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Aug 2021 06:55:12.0672 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: tGiG28JfJ2jerAenpxc2fLbBaN68bpbsVSuewGT/OZ1EzJ8W8GkwfjQT8ICoKz0x X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2368 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add an initial dtsi file for generic SoC features of NXP S32G2. Signed-off-by: Chester Lin --- arch/arm64/boot/dts/freescale/s32g2.dtsi | 98 ++++++++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/s32g2.dtsi diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi new file mode 100644 index 000000000000..3321819c1a2d --- /dev/null +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2021 SUSE LLC + */ + +#include + +/ { + compatible = "fsl,s32g2"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + enable-method = "psci"; + next-level-cache = <&cluster0_l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + enable-method = "psci"; + next-level-cache = <&cluster0_l2>; + }; + + cpu2: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x100>; + enable-method = "psci"; + next-level-cache = <&cluster1_l2>; + }; + + cpu3: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x101>; + enable-method = "psci"; + next-level-cache = <&cluster1_l2>; + }; + + cluster0_l2: l2-cache0 { + compatible = "cache"; + }; + + cluster1_l2: l2-cache1 { + compatible = "cache"; + }; + }; + + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + ranges; + + gic: interrupt-controller@50800000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0 0x50800000 0 0x10000>, + <0 0x50880000 0 0x200000>, + <0 0x50400000 0 0x2000>, + <0 0x50410000 0 0x2000>, + <0 0x50420000 0 0x2000>; + interrupts = ; + }; + }; +};