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Fri, 23 Jul 2021 22:32:07 +0000 From: Sean Anderson To: Peter Korsgaard , Peter Korsgaard , linux-serial@vger.kernel.org Cc: Greg Kroah-Hartman , Alexander Sverdlin , Michal Simek , Sean Anderson Subject: [PATCH 4/5] tty: serial: uartlite: Initialize termios with fixed synthesis parameters Date: Fri, 23 Jul 2021 18:31:50 -0400 Message-Id: <20210723223152.648326-5-sean.anderson@seco.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210723223152.648326-1-sean.anderson@seco.com> References: <20210723223152.648326-1-sean.anderson@seco.com> X-ClientProxiedBy: BLAP220CA0027.NAMP220.PROD.OUTLOOK.COM (2603:10b6:208:32c::32) To DB7PR03MB4523.eurprd03.prod.outlook.com (2603:10a6:10:19::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from plantagenet.inhand.com (50.195.82.171) by BLAP220CA0027.NAMP220.PROD.OUTLOOK.COM (2603:10b6:208:32c::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4352.24 via Frontend Transport; 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Note that these properties are fixed and undiscoverable. Once we have determined how the uart is configured, we set the termios to let users know, and to initialize the timeout to the correct value. The defaults match ulite_console_setup. xlnx,use-parity, xlnx,odd-parity, and xlnx,data-bits are optional since there were in-tree users (and presumably out-of-tree users) who did not set them. Signed-off-by: Sean Anderson --- drivers/tty/serial/uartlite.c | 66 +++++++++++++++++++++++++++++++---- 1 file changed, 60 insertions(+), 6 deletions(-) diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c index f42ccc40ffa6..39c17ab206ca 100644 --- a/drivers/tty/serial/uartlite.c +++ b/drivers/tty/serial/uartlite.c @@ -60,9 +60,20 @@ static struct uart_port *console_port; #endif +/** + * struct uartlite_data: Driver private data + * reg_ops: Functions to read/write registers + * clk: Our parent clock, if present + * baud: The baud rate configured when this device was synthesized + * parity: The parity settings, like for uart_set_options() + * bits: The number of data bits + */ struct uartlite_data { const struct uartlite_reg_ops *reg_ops; struct clk *clk; + int baud; + int parity; + int bits; }; struct uartlite_reg_ops { @@ -652,6 +663,9 @@ static int ulite_assign(struct device *dev, int id, u32 base, int irq, port->type = PORT_UNKNOWN; port->line = id; port->private_data = pdata; + /* Initialize the termios to what was configured at synthesis-time */ + uart_set_options(port, NULL, pdata->baud, pdata->parity, pdata->bits, + 'n'); dev_set_drvdata(dev, port); @@ -756,18 +770,58 @@ static int ulite_probe(struct platform_device *pdev) struct uartlite_data *pdata; int irq, ret; int id = pdev->id; -#ifdef CONFIG_OF - const __be32 *prop; - prop = of_get_property(pdev->dev.of_node, "port-number", NULL); - if (prop) - id = be32_to_cpup(prop); -#endif pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data), GFP_KERNEL); if (!pdata) return -ENOMEM; + if (IS_ENABLED(CONFIG_OF)) { + const char *prop; + struct device_node *np = pdev->dev.of_node; + u32 val; + + prop = "port-number"; + ret = of_property_read_u32(np, prop, &id); + if (ret && ret != -EINVAL) +of_err: + return dev_err_probe(&pdev->dev, ret, + "could not read %s\n", prop); + + prop = "current-speed"; + ret = of_property_read_u32(np, prop, &pdata->baud); + if (ret) + goto of_err; + + prop = "xlnx,use-parity"; + ret = of_property_read_u32(np, prop, &val); + if (ret && ret != -EINVAL) + goto of_err; + + if (val) { + prop = "xlnx,odd-parity"; + ret = of_property_read_u32(np, prop, &val); + if (ret) + goto of_err; + + if (val) + pdata->parity = 'o'; + else + pdata->parity = 'e'; + } else { + pdata->parity = 'n'; + } + + prop = "xlnx,data-bits"; + ret = of_property_read_u32(np, prop, &pdata->bits); + if (ret && ret != -EINVAL) + goto of_err; + } else { + pdata->baud = 9600; + pdata->parity = 'n'; + pdata->bits = 8; + } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) return -ENODEV;