From patchwork Thu Mar 4 16:23:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan LE RAY X-Patchwork-Id: 394094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A058FC432C3 for ; Thu, 4 Mar 2021 16:25:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 79D6D64F60 for ; Thu, 4 Mar 2021 16:25:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237208AbhCDQYZ (ORCPT ); Thu, 4 Mar 2021 11:24:25 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:28326 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S237036AbhCDQYJ (ORCPT ); Thu, 4 Mar 2021 11:24:09 -0500 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 124GCAAK025864; Thu, 4 Mar 2021 17:23:18 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=pZPL4ia9b1JWX6EFamiyxgymffaer//iLAiGCcHKsL0=; b=SuaMZF+XzpchtvPy4OBL4hxkGyiXk15sXWDDUp0CAmGKnT6gzrgMZOEPKMxlyIuRglCF ljXLHPkBO7kTDiWBKqaSSh9q7Wo+3QvhKWR1PB2NC2wJtc88vL5AS5gJaHUhKOAfM+Jl WTN9QCe3VMGy3pWt7wiYf6BNbQRsxpeiO2qNSxl52hrHEW3b7QT+mqKbljpSiiCDiSR9 iuK1yRNy+ooB7t0d9PPycQC6VSqZx9YpqESuWgnXi69MyrZYzyd+svCx2zbXJDrwcssf f9QNqasUTMs4XxWxgV94RwngU5/LMLgW/vc7zuUKUA+7NH9O2MeSReXeZeJXWGL31U/j 1w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 36yfdygh3n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 04 Mar 2021 17:23:18 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E203B10002A; Thu, 4 Mar 2021 17:23:17 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D549D20741B; Thu, 4 Mar 2021 17:23:17 +0100 (CET) Received: from localhost (10.75.127.49) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 4 Mar 2021 17:23:17 +0100 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , Alexandre Torgue CC: , , , , Erwan Le Ray , Fabrice Gasnier , Valentin Caron Subject: [PATCH v2 08/13] serial: stm32: fix tx dma completion, release channel Date: Thu, 4 Mar 2021 17:23:03 +0100 Message-ID: <20210304162308.8984-9-erwan.leray@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210304162308.8984-1-erwan.leray@foss.st.com> References: <20210304162308.8984-1-erwan.leray@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG1NODE2.st.com (10.75.127.2) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-04_05:2021-03-03,2021-03-04 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org This patch add a proper release of dma channels when completing dma tx. Fixes: 3489187204eb ("serial: stm32: adding dma support") Signed-off-by: Erwan Le Ray diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index a381ee52168a..74046ae3a412 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -292,6 +292,7 @@ static void stm32_usart_tx_dma_complete(void *arg) struct stm32_port *stm32port = to_stm32_port(port); const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; + dmaengine_terminate_async(stm32port->tx_ch); stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); stm32port->tx_dma_busy = false;