From patchwork Fri Feb 19 17:47:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan LE RAY X-Patchwork-Id: 385167 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51826C4332B for ; Fri, 19 Feb 2021 17:49:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1D44064EB2 for ; Fri, 19 Feb 2021 17:49:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230160AbhBSRs6 (ORCPT ); Fri, 19 Feb 2021 12:48:58 -0500 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:37782 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230019AbhBSRsj (ORCPT ); Fri, 19 Feb 2021 12:48:39 -0500 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 11JHkUH2018180; Fri, 19 Feb 2021 18:47:48 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=LHZ6z1XwXrc4VoJ+rrzL0PIbM30spCyejAK4kL/Xd4E=; b=caFKuchYyQf/p+LDXMDUcNZ/htp1hgDgIAJGUTQPmhWf+2AOSlwZeQAoNgz3OD9g1+zj Fetm4W9LhURxtsU7TQtXRVWxNiNISaEWhRrRfgNxZKgtZA77Il5psgEbluLDGpLLTrV5 U34kL0crPlWlNKX68BC88BUrvt6GPdyS9vlLne7eMrzx3Yr27jcW0iiZiRBUzlri45gj v2/nZnprS7WlY0hurgiYo372Bhe2QLyEyX7uBK57gXaCPxLhnJExklRiplXuSZy8iJ+V sCkKXYX+neIa9hpuR0iSZ3aUkCgCTMk/dleFlqanPn3bzs4wHdF6EsJzp3iHTx4KcYra gg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 36p707550x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Feb 2021 18:47:48 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id F354C100034; Fri, 19 Feb 2021 18:47:47 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E912B25F3FC; Fri, 19 Feb 2021 18:47:47 +0100 (CET) Received: from localhost (10.75.127.44) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 19 Feb 2021 18:47:47 +0100 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , Alexandre Torgue CC: , , , , Erwan Le Ray , Fabrice Gasnier , Valentin Caron Subject: [PATCH 08/13] serial: stm32: fix tx dma completion, release channel Date: Fri, 19 Feb 2021 18:47:31 +0100 Message-ID: <20210219174736.1022-9-erwan.leray@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210219174736.1022-1-erwan.leray@foss.st.com> References: <20210219174736.1022-1-erwan.leray@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG3NODE3.st.com (10.75.127.9) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-02-19_08:2021-02-18,2021-02-19 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org This patch add a proper release of dma channels when completing dma tx. Fixes: 3489187204eb ("serial: stm32: adding dma support") Signed-off-by: Erwan Le Ray diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 4ba164820904..7da16d468b84 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -292,6 +292,7 @@ static void stm32_usart_tx_dma_complete(void *arg) struct stm32_port *stm32port = to_stm32_port(port); struct stm32_usart_offsets *ofs = &stm32port->info->ofs; + dmaengine_terminate_async(stm32port->tx_ch); stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); stm32port->tx_dma_busy = false;