From patchwork Wed Jul 31 19:56:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170219 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp4438589ile; Wed, 31 Jul 2019 13:03:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqwW3FqU7N/dxeYPQI36iY88i2G8QHem5JHPchsSr6GmoYt6jQUQ2c1wH03WSHxGQ5JuEteX X-Received: by 2002:a17:902:b70c:: with SMTP id d12mr117216651pls.314.1564603427140; Wed, 31 Jul 2019 13:03:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564603427; cv=none; d=google.com; s=arc-20160816; b=G0CfUfyKeA5/st/5CufNE95qKLXsn7gWgTQ6RWLgxgxv70pP0VR+lHj6KXDhrvlWAi lToMOD9xFWR50HXd/k3pogMuIK0iL2mTfWzSnvEF3Teb+3qmUA/Kx80rEwPbjYWjaNGI 0btZi0Waj+aTtqRoejx28Cyv7jRXwpRDD5EFm9d6WOPV3HI4lu+Jklw3oIYZ0xyLibWa snbgQKcNJaW8gQz72Kfxtf9188eY2ynPUe8Xl/dLDobyoVJncJN1pMlEMZQqar9ptyvq Ln4QbhLxS5fc5bf/ZGzJxRxifVzaRWN2UWweyqmN7gB5hd7yDbxXBMFui3HdLaj+CA1l Y5Ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=0roY5jHNiendS4HVDKkHP+N8cME7V55us0X4aIU6Wu4=; b=R0r5UIH/jfzaBTMdUjX02fp7p1acRtzw8ep0UfAJY99M6zqLiNQgJxJlwzDL5SfB2f MupU6Mxjyan8xqaaMGKi5RNTec9oyq4PeTFZO+cNRXxAXJJ7cPqhue/GtEi8PTuZN+lJ vcNTOzUKZkOV3JVxYQqcseJjevifTtShL1KI+0ZfhprE+QZcF7cQjC+TxgPD6eX7XKOt eFM9Sm7U5dwau9MROyUz13F3IdtZRHuUPpTLdKUy2G/LkwxDDxQF+MqhR5xdS/ErT16Y v75i/ND0KVOFryluRM62WIxqtbRo7F0xWR+Azob0dmdsQHERNn5f8DDxv1wnHr5lWyws kJ6g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id cj12si30949635plb.237.2019.07.31.13.03.46; Wed, 31 Jul 2019 13:03:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726712AbfGaUDq (ORCPT + 1 other); Wed, 31 Jul 2019 16:03:46 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:52173 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726594AbfGaUDq (ORCPT ); Wed, 31 Jul 2019 16:03:46 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1Movrq-1iiz0R3bLi-00qWDH; Wed, 31 Jul 2019 22:02:57 +0200 From: Arnd Bergmann To: soc@kernel.org, linux-arm-kernel@lists.infradead.org, Vladimir Zapolskiy , Sylvain Lemieux , Russell King , Gregory Clement , Linus Walleij Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , "David S. Miller" , Greg Kroah-Hartman , Alan Stern , Guenter Roeck , linux-gpio@vger.kernel.org, netdev@vger.kernel.org, linux-serial@vger.kernel.org, linux-usb@vger.kernel.org, linux-watchdog@vger.kernel.org, Arnd Bergmann , linux-kernel@vger.kernel.org Subject: [PATCH 10/14] ARM: lpc32xx: clean up header files Date: Wed, 31 Jul 2019 21:56:52 +0200 Message-Id: <20190731195713.3150463-11-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190731195713.3150463-1-arnd@arndb.de> References: <20190731195713.3150463-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:/LhIgzDOVG5Q+X9XFfAhbZFk3l12JGjC84UmS1anNS/jA7+748N Y9tWamhprDvlrPz56AFbX3QzdSJ+M+7noEtpgxuax8FHc2708BPrBKKezAw1psuugfdsrRh MQhFtQ6ZWKDowzyFxjiE0TsIp+VEIviu7/lI3Y6zb1FiElIS3W9RHAsYr035BupH1spFCaS DpfdGbEgRDrjcHHtDS+vA== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:PJ0dxqaWcWg=:eeSvLeu1RyA7KZHoSWuHN3 iBhmJHidpvs265m8g/hMFm8qKWd6XEFB1nyNfzGO5Qj1k6ScExPk8MjJGdGzD6YL2mryZE4F0 OXXwa0FUlRrhvw7ESd4BtUxy8+re7W/mqpEGhczf+oj3uQDOVmA5E4ymlpUlBOiiVKLF88Yv4 p2pwVfG7N43qybeqtBNqeunSt89HTYditI9hORMkEYPnsbwtOLUBrTb7oRpZZlhVZMSJ2CMHg qYpc3KICHU0dZk8DEtwXL8xgzkVtZ5P3nZ5YpE3U0j8UM1QQE/fgNC0IL6M3zIapw+kYrOVfh jzcZ4dX/wXiCwCcktb8ZaBJIbr8pWgQFeXlKlUS1xwjRnGeIpXCavYbgNtGLSUpQC0BbF18ji xHL004ivie5brPONQsEKo8c1cJ04pYQUWWz+g5zqXa0rrzQ5j6iCwBgC6LwPORVcEq6PrGgGR XRXkz5A35HNDPDFQrR5Pj7OchzTc7rBMTWgHVa5R9vxVgqG8HAbnUOHOuVeA4YmPJZXS0FKyb fEPPF7J3XCEyaaJpx6Yu4YOnT2ksxx34lUJ+pXjsUqlo/AQXNeDg7KRvBdp+uhfmkqRChr7J6 5Ge1OwuuBYggQtkv3fXqElSPJRrBmxmAY2UTEKUM+h8geaG7yPl2t5BR/tf4WjDpR91b7w7p8 2dyVGzqUe5LSGPv4S8y9GTUQFtEioqrjduZhwjsR5mr0GYMg1LIG44UM+JuWeXR1Jwxep7hi8 HQaPWuoy8C7lbeIEkj9K43J/ShhIeqTwCT91Mg== Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org All device drivers have stopped relying on mach/*.h headers, so move the remaining headers into arch/arm/mach-lpc32xx/lpc32xx.h to prepare for multiplatform builds. The mach/entry-macro.S file has been unused for a long time now and can simply get removed. Signed-off-by: Arnd Bergmann --- arch/arm/mach-lpc32xx/common.c | 3 +- .../mach-lpc32xx/include/mach/entry-macro.S | 28 ------------------- arch/arm/mach-lpc32xx/include/mach/hardware.h | 25 ----------------- .../mach-lpc32xx/include/mach/uncompress.h | 4 +-- .../{include/mach/platform.h => lpc32xx.h} | 18 ++++++++++-- arch/arm/mach-lpc32xx/pm.c | 3 +- arch/arm/mach-lpc32xx/serial.c | 3 +- arch/arm/mach-lpc32xx/suspend.S | 3 +- 8 files changed, 21 insertions(+), 66 deletions(-) delete mode 100644 arch/arm/mach-lpc32xx/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-lpc32xx/include/mach/hardware.h rename arch/arm/mach-lpc32xx/{include/mach/platform.h => lpc32xx.h} (98%) -- 2.20.0 Acked-by: Sylvain Lemieux diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index a475339333c1..304ea61a0716 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -13,8 +13,7 @@ #include #include -#include -#include +#include "lpc32xx.h" #include "common.h" /* diff --git a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S deleted file mode 100644 index eec0f5f7e722..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-lpc32xx/include/mach/entry-macro.S - * - * Author: Kevin Wells - * - * Copyright (C) 2010 NXP Semiconductors - */ - -#include -#include - -#define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) - .endm - -/* - * Return IRQ number in irqnr. Also return processor Z flag status in CPSR - * as set if an interrupt is pending. - */ - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #LPC32XX_INTC_MASKED_STATUS_OFS] - clz \irqnr, \irqstat - rsb \irqnr, \irqnr, #31 - teq \irqstat, #0 - .endm diff --git a/arch/arm/mach-lpc32xx/include/mach/hardware.h b/arch/arm/mach-lpc32xx/include/mach/hardware.h deleted file mode 100644 index 4866f096ffce..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/hardware.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-lpc32xx/include/mach/hardware.h - * - * Copyright (c) 2005 MontaVista Software, Inc. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* - * Start of virtual addresses for IO devices - */ -#define IO_BASE 0xF0000000 - -/* - * This macro relies on fact that for all HW i/o addresses bits 20-23 are 0 - */ -#define IO_ADDRESS(x) IOMEM(((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\ - IO_BASE) - -#define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x)) -#define io_v2p(x) ((((x) & 0x0ff00000) << 4) | ((x) & 0x000fffff)) - -#endif diff --git a/arch/arm/mach-lpc32xx/include/mach/uncompress.h b/arch/arm/mach-lpc32xx/include/mach/uncompress.h index a568812a0b91..74b7aa0da0e4 100644 --- a/arch/arm/mach-lpc32xx/include/mach/uncompress.h +++ b/arch/arm/mach-lpc32xx/include/mach/uncompress.h @@ -12,15 +12,13 @@ #include -#include -#include - /* * Uncompress output is hardcoded to standard UART 5 */ #define UART_FIFO_CTL_TX_RESET (1 << 2) #define UART_STATUS_TX_MT (1 << 6) +#define LPC32XX_UART5_BASE 0x40090000 #define _UARTREG(x) (void __iomem *)(LPC32XX_UART5_BASE + (x)) diff --git a/arch/arm/mach-lpc32xx/include/mach/platform.h b/arch/arm/mach-lpc32xx/lpc32xx.h similarity index 98% rename from arch/arm/mach-lpc32xx/include/mach/platform.h rename to arch/arm/mach-lpc32xx/lpc32xx.h index 1c53790444fc..5eeb884a1993 100644 --- a/arch/arm/mach-lpc32xx/include/mach/platform.h +++ b/arch/arm/mach-lpc32xx/lpc32xx.h @@ -7,8 +7,8 @@ * Copyright (C) 2010 NXP Semiconductors */ -#ifndef __ASM_ARCH_PLATFORM_H -#define __ASM_ARCH_PLATFORM_H +#ifndef __ARM_LPC32XX_H +#define __ARM_LPC32XX_H #define _SBF(f, v) ((v) << (f)) #define _BIT(n) _SBF(n, 1) @@ -700,4 +700,18 @@ #define LPC32XX_USB_OTG_DEV_CLOCK_ON _BIT(1) #define LPC32XX_USB_OTG_HOST_CLOCK_ON _BIT(0) +/* + * Start of virtual addresses for IO devices + */ +#define IO_BASE 0xF0000000 + +/* + * This macro relies on fact that for all HW i/o addresses bits 20-23 are 0 + */ +#define IO_ADDRESS(x) IOMEM(((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\ + IO_BASE) + +#define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x)) +#define io_v2p(x) ((((x) & 0x0ff00000) << 4) | ((x) & 0x000fffff)) + #endif diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c index 32bca351a73b..b27fa1b9f56c 100644 --- a/arch/arm/mach-lpc32xx/pm.c +++ b/arch/arm/mach-lpc32xx/pm.c @@ -70,8 +70,7 @@ #include -#include -#include +#include "lpc32xx.h" #include "common.h" #define TEMP_IRAM_AREA IO_ADDRESS(LPC32XX_IRAM_BASE) diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c index cfb35e5691cd..3e765c4bf986 100644 --- a/arch/arm/mach-lpc32xx/serial.c +++ b/arch/arm/mach-lpc32xx/serial.c @@ -16,8 +16,7 @@ #include #include -#include -#include +#include "lpc32xx.h" #include "common.h" #define LPC32XX_SUART_FIFO_SIZE 64 diff --git a/arch/arm/mach-lpc32xx/suspend.S b/arch/arm/mach-lpc32xx/suspend.S index 374f9f07fe48..3f0a8282ef6f 100644 --- a/arch/arm/mach-lpc32xx/suspend.S +++ b/arch/arm/mach-lpc32xx/suspend.S @@ -11,8 +11,7 @@ */ #include #include -#include -#include +#include "lpc32xx.h" /* Using named register defines makes the code easier to follow */ #define WORK1_REG r0