From patchwork Tue Jun 5 06:01:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137669 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp545690lji; Mon, 4 Jun 2018 23:02:44 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJ+j9+Vyohowucgq0goiR1Y0CCdAPvQvREU7ZsxRXDZ7BF4DssgOL4+gktW+hbUv+JdvjEM X-Received: by 2002:a63:4384:: with SMTP id q126-v6mr19360836pga.294.1528178564470; Mon, 04 Jun 2018 23:02:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528178564; cv=none; d=google.com; s=arc-20160816; b=WNd3jzYgdZIJmBNU74YoW+cinmnyJkXobzl6/QUZkrhETnp3Kbg0WrF8iZwmfGuOiZ KsiZWVW2D7LE8lCGr48bZfFjZv97dfLnZbLjlGo7hD6QrGGK6uwclkg8tQMAKptJgSHc g4bN7cRfg/slLkavwrixgefNCAxOepyHdMJB83rrdvTX+nCVDhRzCVmWOF0pfl/Kk5VO bJplVIvdVRL0AlKPOD8WrPHndnb7krQqhv6jn8ZJf5TJLFtHGEo7UC4yFXOTXsnQjLkD Z6yHp1/pBrtKchwJAJxcmHWmF1k+KXbZtWFe1FNwsR2Jw7Q2jr7f5P0i+EK21V5AbdNJ n+qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=eimUDPqeWeUOFmqxLULGpeXlsU4UAQfJ0GBbbMalx6w=; b=fdcMN0wcWdGJv1PWzXZS/fu54rDZK0teBbCcjbWRap4KPshmvmGkcUqaNzN5JJCRxS 8RkTeqKTqZ7u/rtohgXlinqdsShkb+HXDy5u52IB9Esn1u93wj5ri2FVf0Pg9sOaIKYE uWISHztMXhlP1nf6A6qSyS06BxNWDoWkhbEWhcIOqzgTtg3jfFe3uBgOiMlyRkG80SlO SC52gWkO9NYa4sut8eO/vmnoOn4dr/qKgQ9SAAlp0h51lHbD7ZiiNiJ16qwZRgXzCJVw G10vbasNYvEWqcjEu8EiazSOtiaeeb+lyH9Afko6t1Yyt9J4AmWQkyDNy0AHvP1LPL40 SERw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=jgUQ5CJ4; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f3-v6si12004888pgp.496.2018.06.04.23.02.44; Mon, 04 Jun 2018 23:02:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=jgUQ5CJ4; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751632AbeFEGCm (ORCPT + 2 others); Tue, 5 Jun 2018 02:02:42 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:36568 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751772AbeFEGC1 (ORCPT ); Tue, 5 Jun 2018 02:02:27 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w5561kV5031133; Tue, 5 Jun 2018 01:01:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528178507; bh=kz9GN7f30FKq5Y4hhYYjFL5nEsk+iH4/oM8OE/47M2s=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jgUQ5CJ4f5Ltb/BT/GSwri08Idk4bTy0ue+60XFMHSFpHKwuX0Q/kSNpFVppWVbRJ D7HFFO9QRDdJEHyvjBW237aKf+gbArGs3Itg41mOxQHrV1JCd020WihaZX+usdzzKn NpcaxeDp8KSAIi3xVx7XQpftmNcR1QctAI0vQdv4= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5561k5g010584; Tue, 5 Jun 2018 01:01:46 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:01:46 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:01:46 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5561kjg021164; Tue, 5 Jun 2018 01:01:46 -0500 From: Nishanth Menon To: Santosh Shilimkar , Will Deacon , Catalin Marinas , Greg Kroah-Hartman , Mark Rutland , Rob Herring CC: , , , , Tony Lindgren , Vignesh R , Tero Kristo , Russell King , Sudeep Holla , Nishanth Menon Subject: [RFC PATCH 1/6] Documentation: arm: ti: Add bindings for AM654 SoC Date: Tue, 5 Jun 2018 01:01:20 -0500 Message-ID: <20180605060125.9518-2-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605060125.9518-1-nm@ti.com> References: <20180605060125.9518-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org The AM654 SoC is a lead device of the K3 Multicore SoC architecture platform, targeted for broad market and industrial control with aim to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Quad ARMv8 A53 cores split over two clusters * GICv3 compliant GIC500 * Configurable L3 Cache and IO-coherent architecture * Dual lock-step capable R5F uC for safety-critical applications * High data throughput capable distributed DMA architecture under NAVSS * Three Gigabit Industrial Communication Subsystems (ICSSG), each with dual PRUs and dual RTUs * Hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL * Centralized System Controller for Security, Power, and Resource management. * Dual ADCSS, eQEP/eCAP, eHRPWM, dual CAN-FD * Flash subystem with OSPI and Hyperbus interfaces * Multimedia capability with CAL, DSS7-UL, SGX544, McASP * Peripheral connectivity including USB3, PCIE, MMC/SD, GPMC, I2C, SPI, GPIO See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Signed-off-by: Nishanth Menon --- Documentation/devicetree/bindings/arm/ti/k3.txt | 33 +++++++++++++++++++++++++ MAINTAINERS | 7 ++++++ 2 files changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/ti/k3.txt -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt new file mode 100644 index 000000000000..cbabb1b89f6f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/k3.txt @@ -0,0 +1,33 @@ +Texas Instruments K3 Multicore SoC architecture device tree bindings +-------------------------------------------------------------------- + +Boards based on K3 Multicore SoC architecture shall have the following property: +- compatible: Every hardware block introduced in K3 Multicore SoC + architecture shall be of the form: + "ti,XXX-YYY", where: + 'XXX' represents the specific SoC part for which the support is added. + 'YYY' represents the corresponding peripheral in SoC being supported. + + NOTE: Generic devices such as GIC or legacy devices shall use the specified + compatible for those devices. + + Example: + compatible = "ti,am654-i2c"; + +SoCs +------------------------------------------- + +Each device tree root node must specify which exact SoC in K3 Multicore SoC +architecture it uses, using one of the following compatible values: + +- AM654 + compatible = "ti,am654"; + +Boards +------------------------------------------- + +In addition, each device tree root node must specify which one or more +of the following board-specific compatible values: + +- AM654 EVM + compatible = "ti,am654-evm", "ti,am654"; diff --git a/MAINTAINERS b/MAINTAINERS index f39a8de1bbd7..cfb35b252ac7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2086,6 +2086,13 @@ L: linux-kernel@vger.kernel.org S: Maintained F: drivers/memory/*emif* +ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE +M: Tero Kristo +M: Nishanth Menon +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Supported +F: Documentation/devicetree/bindings/arm/ti/k3.txt + ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE M: Santosh Shilimkar L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)