From patchwork Mon May 2 09:19:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kefeng Wang X-Patchwork-Id: 67004 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp974488qge; Mon, 2 May 2016 02:14:53 -0700 (PDT) X-Received: by 10.66.253.68 with SMTP id zy4mr49957417pac.81.1462180493157; Mon, 02 May 2016 02:14:53 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d10si9209564pap.88.2016.05.02.02.14.53; Mon, 02 May 2016 02:14:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753362AbcEBJOi (ORCPT + 2 others); Mon, 2 May 2016 05:14:38 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:3789 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753320AbcEBJOe (ORCPT ); Mon, 2 May 2016 05:14:34 -0400 Received: from 172.24.1.136 (EHLO szxeml426-hub.china.huawei.com) ([172.24.1.136]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DGK74560; Mon, 02 May 2016 17:14:26 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml426-hub.china.huawei.com (10.82.67.181) with Microsoft SMTP Server id 14.3.235.1; Mon, 2 May 2016 17:14:17 +0800 From: Kefeng Wang To: , CC: , , , , , Subject: [PATCH v5] serial: 8250_dw: fix wrong logic in dw8250_check_lcr() Date: Mon, 2 May 2016 17:19:46 +0800 Message-ID: <1462180786-12588-1-git-send-email-wangkefeng.wang@huawei.com> X-Mailer: git-send-email 2.6.0.GIT In-Reply-To: <1459835585-25751-1-git-send-email-wangkefeng.wang@huawei.com> References: <1459835585-25751-1-git-send-email-wangkefeng.wang@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.57271A74.0038, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 6bed893b2cd10aa8bdf4d0b2ec397148 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Commit cdcea058e510 ("serial: 8250_dw: Avoid serial_outx code duplicate with new dw8250_check_lcr()") introduce a wrong logic when write val to LCR reg. When CONFIG_64BIT enabled, __raw_writeq is used unconditionally. The __raw_readq/__raw_writeq is introduced by commit bca2092d7897 ("serial: 8250_dw: Use 64-bit access for OCTEON.") for OCTEON. So for 64BIT && !PORT_OCTEON, we better to use coincident write function. Fixes: cdcea058e510("serial: 8250_dw: Avoid serial_outx code duplicate with new dw8250_check_lcr()") Signed-off-by: Kefeng Wang --- Changes since v4: - Update change log, suggested by Andy Shevchenko. Changes since v3: - Add patch change log, suggested by Greg Kroah-Hartman. Changes since v2: - Add #ifdef CONFIG_64BIT back, ensure it can be built under configuration lacking readq/writeq. Changes since v1: - Repace '#ifdef CONFIG_64BIT' with IS_ENABLED(CONFIG_64BIT). - Enrich patch log, and add Fixes tag. drivers/tty/serial/8250/8250_dw.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) -- 2.6.0.GIT -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index a3fb95d..47d1f3e 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -104,15 +104,16 @@ static void dw8250_check_lcr(struct uart_port *p, int value) dw8250_force_idle(p); #ifdef CONFIG_64BIT - __raw_writeq(value & 0xff, offset); -#else + if (p->type == PORT_OCTEON) + __raw_writeq(value & 0xff, offset); + else +#endif if (p->iotype == UPIO_MEM32) writel(value, offset); else if (p->iotype == UPIO_MEM32BE) iowrite32be(value, offset); else writeb(value, offset); -#endif } /* * FIXME: this deadlocks if port->lock is already held