From patchwork Fri Aug 16 20:50:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Kryger X-Patchwork-Id: 19248 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ye0-f198.google.com (mail-ye0-f198.google.com [209.85.213.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id CFEAA248E6 for ; Fri, 16 Aug 2013 20:50:56 +0000 (UTC) Received: by mail-ye0-f198.google.com with SMTP id m12sf2548287yen.9 for ; Fri, 16 Aug 2013 13:50:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe:content-type:content-transfer-encoding; bh=7BPWETO4iSmzzgFPcnyVpBZvTpNGSpE6r6V18Lu65yg=; b=egWkLk/XHAfEXz8lvcJ7g20hxmjCRJ+Tm2CBc4C/bgbFge0kzaktP13PVCULQNy+tp svw/amtoTTuf53I3WkIko//+30MAC9iGviTlM2vcO6H6TBh5zIPMsBDALCFmzNCEfF6H 6f1revH6sbMfsOaiDfApXqp1hAPMIlApZYyl4FnWnzHTR4XC8GE227OCJkaCB+/x+dMO 0X/MT1sNBC605JW3h5j6yFExSo1AbKs1MUOPmPEvoEW+X2Obv4EwE3pmGzE1+MtCutbC JvvsYXs1S7IOnpJf23uXN2tbm9s91Fw3JnB+ZiTfpkTMijgoQrX/dd4ScCE09lMuAkmf OE4w== X-Received: by 10.236.128.113 with SMTP id e77mr1260322yhi.6.1376686255924; Fri, 16 Aug 2013 13:50:55 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.30.35 with SMTP id p3ls978557qeh.97.gmail; Fri, 16 Aug 2013 13:50:55 -0700 (PDT) X-Received: by 10.58.196.132 with SMTP id im4mr1892265vec.28.1376686255760; Fri, 16 Aug 2013 13:50:55 -0700 (PDT) Received: from mail-ve0-f181.google.com (mail-ve0-f181.google.com [209.85.128.181]) by mx.google.com with ESMTPS id ae9si770851vdc.15.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 16 Aug 2013 13:50:55 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.128.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.181; Received: by mail-ve0-f181.google.com with SMTP id jz10so1661163veb.40 for ; Fri, 16 Aug 2013 13:50:55 -0700 (PDT) X-Gm-Message-State: ALoCoQkPyndklxWCYW/nAbT99sN4SJ5Xm9g6tUr3nyJkk2eWeoCmJmbewzbyBdxwoIlrk2nThgeQ X-Received: by 10.52.73.135 with SMTP id l7mr2461160vdv.9.1376686255623; Fri, 16 Aug 2013 13:50:55 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp88805vcz; Fri, 16 Aug 2013 13:50:54 -0700 (PDT) X-Received: by 10.68.59.73 with SMTP id x9mr3459701pbq.131.1376686254336; Fri, 16 Aug 2013 13:50:54 -0700 (PDT) Received: from mms3.broadcom.com (mms3.broadcom.com. [216.31.210.19]) by mx.google.com with ESMTP id bk3si2305525pbd.148.1969.12.31.16.00.00; Fri, 16 Aug 2013 13:50:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of tkryger@broadcom.com designates 216.31.210.19 as permitted sender) client-ip=216.31.210.19; Received: from [10.9.208.57] by mms3.broadcom.com with ESMTP (Broadcom SMTP Relay (Email Firewall v6.5)); Fri, 16 Aug 2013 13:40:42 -0700 X-Server-Uuid: B86B6450-0931-4310-942E-F00ED04CA7AF Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.1.438.0; Fri, 16 Aug 2013 13:50:47 -0700 Received: from mail-sj1-12.sj.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.1.438.0; Fri, 16 Aug 2013 13:50:46 -0700 Received: from mps-infra-lab3.broadcom.com ( mps-infra-lab3.sj.broadcom.com [10.19.114.109]) by mail-sj1-12.sj.broadcom.com (Postfix) with ESMTP id B7B7D207C0; Fri, 16 Aug 2013 13:50:46 -0700 (PDT) Received: by mps-infra-lab3.broadcom.com (Postfix, from userid 1004) id 9C4AB4589B8; Fri, 16 Aug 2013 13:50:46 -0700 (PDT) From: "Tim Kryger" To: "Greg Kroah-Hartman" , "Heikki Krogerus" cc: "Tim Kryger" , linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, patches@linaro.org Subject: [PATCH] serial: 8250_dw: Report CTS asserted for auto flow Date: Fri, 16 Aug 2013 13:50:15 -0700 Message-ID: <1376686215-25686-1-git-send-email-tim.kryger@linaro.org> X-Mailer: git-send-email 1.8.0.1 MIME-Version: 1.0 X-WSS-ID: 7E1051C02L875116914-01-01 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: tim.kryger@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , When a serial port is configured for RTS/CTS flow control, serial core will disable the transmitter if it observes CTS is de-asserted. This is perfectly reasonable and appropriate when the UART lacks the ability to automatically perform CTS flow control. However, if the UART hardware can manage flow control automatically, it is important that software not get involved. When the DesignWare UART enables 16C750 style auto-RTS/CTS it stops generating interrupts for changes in CTS state so software mostly stays out of the way. However, it does report the true state of CTS in the MSR so software may notice it is de-asserted and respond by improperly disabling the transmitter. Once this happens the transmitter will be blocked forever. To avoid this situation, we simply lie to the 8250 and serial core by reporting that CTS is asserted whenever auto-RTS/CTS mode is enabled. Signed-off-by: Tim Kryger Reviewed-by: Matt Porter Reviewed-by: Markus Mayer --- drivers/tty/serial/8250/8250_dw.c | 34 ++++++++++++++++++++++++++-------- 1 file changed, 26 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 76a8daa..daf710f 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -57,11 +57,25 @@ struct dw8250_data { int last_lcr; + int last_mcr; int line; struct clk *clk; u8 usr_reg; }; +static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value) +{ + struct dw8250_data *d = p->private_data; + + /* If reading MSR, report CTS asserted when auto-CTS/RTS enabled */ + if (offset == UART_MSR && d->last_mcr & UART_MCR_AFE) { + value |= UART_MSR_CTS; + value &= ~UART_MSR_DCTS; + } + + return value; +} + static void dw8250_serial_out(struct uart_port *p, int offset, int value) { struct dw8250_data *d = p->private_data; @@ -69,15 +83,17 @@ static void dw8250_serial_out(struct uart_port *p, int offset, int value) if (offset == UART_LCR) d->last_lcr = value; - offset <<= p->regshift; - writeb(value, p->membase + offset); + if (offset == UART_MCR) + d->last_mcr = value; + + writeb(value, p->membase + (offset << p->regshift)); } static unsigned int dw8250_serial_in(struct uart_port *p, int offset) { - offset <<= p->regshift; + unsigned int value = readb(p->membase + (offset << p->regshift)); - return readb(p->membase + offset); + return dw8250_modify_msr(p, offset, value); } /* Read Back (rb) version to ensure register access ording. */ @@ -94,15 +110,17 @@ static void dw8250_serial_out32(struct uart_port *p, int offset, int value) if (offset == UART_LCR) d->last_lcr = value; - offset <<= p->regshift; - writel(value, p->membase + offset); + if (offset == UART_MCR) + d->last_mcr = value; + + writel(value, p->membase + (offset << p->regshift)); } static unsigned int dw8250_serial_in32(struct uart_port *p, int offset) { - offset <<= p->regshift; + unsigned int value = readl(p->membase + (offset << p->regshift)); - return readl(p->membase + offset); + return dw8250_modify_msr(p, offset, value); } static int dw8250_handle_irq(struct uart_port *p)