From patchwork Fri Aug 2 21:45:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 816473 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FD631ABEB6; Fri, 2 Aug 2024 21:45:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.235.227.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722635122; cv=none; b=IGt8xJiNYacYwo05xnO+ZNnMwBMK/GDRTJHmPvMGeS0/r/Hc7U8R56MnfNnIn8WT5cMvtZj8nrBqOQYMYeXkbby4g4hZ2WI9enpeIqcx6CCDh83JrwuBYg3yUdalEJEC5jVCwKZhWN8+QFS/yBv6oKTFzou7unVtIihoL1iWQDI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722635122; c=relaxed/simple; bh=OeKajZuaytCAh2Uk8TrK0/Fy7goIybMGcEEMGnPG4GM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=sQidy8JrBWcdM84hU4xBY9IYHtdDLPQr9ANImPeu9N/21rFdVaqo0uShzBNTo7G3WUSf9l+K8vA4qvuZFZfJZLw3DYsrvhmaNh9Y+HZdud5ruhIHzCmEpxnffPMy6BCZNiblOktmnA0QZNcOgDF7/6stocbJJc62G6alxNmsRrc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=y5v+B+Mc; arc=none smtp.client-ip=46.235.227.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="y5v+B+Mc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1722635118; bh=OeKajZuaytCAh2Uk8TrK0/Fy7goIybMGcEEMGnPG4GM=; h=From:To:Cc:Subject:Date:From; b=y5v+B+McR6xRSVnDmeTREf0m1Ohyx7eabCJ+ZG+8T6EBNvhfvbRPYKRolq60bEvh8 Bd41fkZ+IfVZS7P4aj03qVxWVNTuXEdY3Thy6fczyO+AZPyiWPQSkd/cSsTBqpCtwm IUMPgB56dyVzyE+OKNIfevXUzj6o25wZjYYo/0GIG3gaGzFqcaW24B4/R8i0GkZpVY oBcQq4ds3nSMrPrahZxw1yBl99xoJ9faC5zPi6d4WXgzvH4+sSbM5zH2yFKttvPcvq ke0hJBQ9njGMEhlUrf79RqYtbwGNVU6MHaefsNXyZGLxrv4LSJ3CSjDnxgELrCT1pe Ve2sMyI5pl6vg== Received: from trenzalore.hitronhub.home (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 62A273782215; Fri, 2 Aug 2024 21:45:13 +0000 (UTC) From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Andi Shyti , Jonathan Cameron , Lars-Peter Clausen , Lee Jones , Greg Kroah-Hartman , Jiri Slaby , Daniel Lezcano , Thomas Gleixner , Chris Morgan , Jonas Karlman , Tim Lunn , Muhammed Efe Cetin , Andy Yan , Jagan Teki , Dragan Simic , Detlev Casanova , Sebastian Reichel , Shresth Prasad , Ondrej Jirman , Weizhao Ouyang , Alexey Charkov , Jimmy Hon , Finley Xiao , Yifeng Zhao , Elaine Zhang , Liang Chen , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-i2c@vger.kernel.org, linux-iio@vger.kernel.org, linux-serial@vger.kernel.org, kernel@collabora.com Subject: [PATCH 00/10] Add device tree for ArmSoM Sige 5 board Date: Fri, 2 Aug 2024 17:45:27 -0400 Message-ID: <20240802214612.434179-1-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.46.0 Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the rk3576-armsom-sige5 device tree as well as its rk3576.dtsi base and pinctrl information in rk3576-pinctrl.dtsi. The other commits add DT bindings documentation for the devices that already work with the current corresponding drivers. The other bindings and driver implementations are in other patch sets: - PMIC: https://lore.kernel.org/lkml/20240802134736.283851-1-detlev.casanova@collabora.com/ - CRU: https://lore.kernel.org/lkml/20240802214053.433493-1-detlev.casanova@collabora.com/ - PINCTRL: https://lore.kernel.org/lkml/20240802145458.291890-1-detlev.casanova@collabora.com/ - PM DOMAIN: https://lore.kernel.org/lkml/20240802151647.294307-1-detlev.casanova@collabora.com/ - DW-MMC: https://lore.kernel.org/lkml/20240802153609.296197-1-detlev.casanova@collabora.com/ - GMAC: https://lore.kernel.org/lkml/20240802173918.301668-1-detlev.casanova@collabora.com/ Detlev Casanova (10): dt-bindings: arm: rockchip: Add ArmSoM Sige 5 dt-bindings: arm: rockchip: Add rk576 compatible string to pmu.yaml dt-bindings: i2c: i2c-rk3x: Add rk3576 compatible dt-bindings: iio: adc: Add rockchip,rk3576-saradc string dt-bindings: mfd: syscon: Add rk3576 QoS register compatible dt-bindings: serial: snps-dw-apb-uart: Add Rockchip RK3576 dt-bindings: soc: rockchip: Add rk3576 syscon compatibles dt-bindings: timer: rockchip: Add rk3576 compatible arm64: dts: rockchip: Add rk3576 SoC base DT arm64: dts: rockchip: Add rk3576-armsom-sige5 board .../devicetree/bindings/arm/rockchip.yaml | 5 + .../devicetree/bindings/arm/rockchip/pmu.yaml | 2 + .../devicetree/bindings/i2c/i2c-rk3x.yaml | 1 + .../bindings/iio/adc/rockchip-saradc.yaml | 3 + .../devicetree/bindings/mfd/syscon.yaml | 2 + .../bindings/serial/snps-dw-apb-uart.yaml | 1 + .../devicetree/bindings/soc/rockchip/grf.yaml | 16 + .../bindings/timer/rockchip,rk-timer.yaml | 1 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3576-armsom-sige5.dts | 613 ++ .../boot/dts/rockchip/rk3576-pinctrl.dtsi | 5775 +++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3576.dtsi | 1635 +++++ 12 files changed, 8055 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3576.dtsi