mbox series

[v5,0/5] Add SCIF support for Renesas RZ/V2H(P) SoC

Message ID 20240604170513.522631-1-prabhakar.mahadev-lad.rj@bp.renesas.com
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Series Add SCIF support for Renesas RZ/V2H(P) SoC | expand

Message

Lad, Prabhakar June 4, 2024, 5:05 p.m. UTC
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This patch series updates DT binding doc and scif driver to add support
for the Renesas RZ/V2H(P) SoC. RZ/V2H(P) SoC supports one channel SCIF
interface.

v4->v5
- Rebased the changes on v6.10-rc2
- Included Acks and RB tags

v3->v4
- patch 2/4 reverted back to version 2
- new patch 3/5 added
- Added new reg type for RZ/V2H

v2->v3
- Included DT validation patches
- Added a new compat string for RZ/V2H(P) SoC
- Added driver changes for RZ/V2H(P) SoC
- Listed interrupts and interrupt-names for every SoC in if check

Cheers,
Prabhakar

Lad Prabhakar (5):
  dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end
  dt-bindings: serial: renesas,scif: Validate 'interrupts' and
    'interrupt-names'
  dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as
    required
  dt-bindings: serial: Add documentation for Renesas RZ/V2H(P)
    (R9A09G057) SCIF support
  serial: sh-sci: Add support for RZ/V2H(P) SoC

 .../bindings/serial/renesas,scif.yaml         | 136 +++++++++++++-----
 drivers/tty/serial/sh-sci.c                   |  55 ++++++-
 include/linux/serial_sci.h                    |   1 +
 3 files changed, 154 insertions(+), 38 deletions(-)

Comments

Geert Uytterhoeven June 5, 2024, 7:31 a.m. UTC | #1
Hu Prabhakar,

On Tue, Jun 4, 2024 at 7:05 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add serial support for RZ/V2H(P) SoC with earlycon.
>
> The SCIF interface in the Renesas RZ/V2H(P) is similar to that available
> in the RZ/G2L (R9A07G044) SoC, with the following differences:
>
> - RZ/V2H(P) SoC has three additional interrupts: one for Tx end/Rx ready
>   and two for Rx and Tx buffer full, all of which are edge-triggered.
> - RZ/V2H(P) supports asynchronous mode, whereas RZ/G2L supports both
>   synchronous and asynchronous modes.
> - There are differences in the configuration of certain registers such
>   as SCSMR, SCFCR, and SCSPTR between the two SoCs.
>
> To handle these differences on RZ/V2H(P) SoC SCIx_RZV2H_SCIF_REGTYPE
> is added.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Hi Geert, Ive restored your RB tag after rebase (as the changes were trival)
> hope that's OK.

Thanks, LGTM!

Gr{oetje,eeting}s,

                        Geert