Message ID | 20240604084729.57239-1-hal.feng@starfivetech.com |
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Tue, 4 Jun 2024 08:47:37 +0000 From: Hal Feng <hal.feng@starfivetech.com> To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jiri Slaby <jirislaby@kernel.org>, =?utf-8?q?Ilpo_J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>, Philipp Zabel <p.zabel@pengutronix.de>, Conor Dooley <conor+dt@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>, Hal Feng <hal.feng@starfivetech.com>, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/3] Add the core reset for UARTs of StarFive JH7110 Date: Tue, 4 Jun 2024 16:47:26 +0800 Message-ID: <20240604084729.57239-1-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.43.2 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: BJXPR01CA0055.CHNPR01.prod.partner.outlook.cn (2406:e500:c211:12::22) To ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:7::14) Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: <linux-serial.vger.kernel.org> List-Subscribe: <mailto:linux-serial+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-serial+unsubscribe@vger.kernel.org> MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZQ2PR01MB1307:EE_|ZQ2PR01MB1324:EE_ X-MS-Office365-Filtering-Correlation-Id: 7143d69a-3776-4f6e-5856-08dc8472fc09 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0;ARA:13230031|7416005|41320700004|366007|1800799015|52116005|38350700005|921011; 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Add the core reset for UARTs of StarFive JH7110
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Hello: This series was applied to riscv/linux.git (for-next) by Greg Kroah-Hartman <gregkh@linuxfoundation.org>: On Tue, 4 Jun 2024 16:47:26 +0800 you wrote: > The UART of StarFive JH7110 needs two reset signals (apb, core) to > initialize. This patch series adds the missing core reset. > > Changes since v1: > - Set maxItems to 1 for resets from other platforms. > > History: > v1: https://lore.kernel.org/all/20240517061713.95803-1-hal.feng@starfivetech.com/ > > [...] Here is the summary with links: - [v2,1/3] dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC (no matching commit) - [v2,2/3] serial: 8250_dw: Use reset array API to get resets (no matching commit) - [v2,3/3] riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible for uarts https://git.kernel.org/riscv/c/4ed81d9dd75f You are awesome, thank you!